State Analysis; Timing Analysis - HP 1630A Operating And Programming Manual

General Information
Model 1630A/D/G
The analyzer can perform overview measurements with which the performance of code modules in software-
intensive systems may then be analyzed . Overview measurements available in all three 1630 models include
state and time interval histograms . The 1630G has added overview measurement features that enhance the
state label histogram and allow time position and linkage measurements . The logic analyzers can be described
as having two basic functions, that of state and timing, and have special features in each function which are
listed below.
State Analysis
The state analysis function of each model features :
" Continuous trace until compare "equal to" or "not equal to" is provided . The compare file is the width of
the analyzer, and has depth of up to 16 words with the 1630A/D and in the edit compare mode of the
1630G . The 1630G has a full compare mode in which the entire trace may be compared .
" Three ORed clocks given in single-phase or two-phase demultiplexing modes.
" Data sampling up to 25 MHz .
" 1024 states available in memory after a trace.
" A State Chart of any user-defined label may be selected for display.
" State analysis can be armed by the timing analysis section .
" A State Histogram of any user-defined label may be selected .
" A Time Interval Histogram of the time software takes to execute from one selected point in software to
another.
" Time Positional measurements for the occurrences of an event per unit time may be made . (1630G only)
Linkage measurements which show the relative frequency of occurrence of a set of events . (1630G only)
Timing Analysis
The timing analysis function of each system features :
" Sampling ranges from 10 nS to 500 mS, in increments of 1, 2, and 5.
" Timing waveforms that can be magnified from X1 to X40 in 1, 2, and 4 increments .
" Time between dual cursors (x and o) can be displayed to within 1 sample period .
" 1024 samples available in memory after a trace.
" Timing analysis can be armed by the state analysis section.
" Timing can be triggered by an asynchronous pattern, ANDed with a glitch or edge on any channel, and
patterns that exceed or fall short of a specified time limit.