DIGITAL-LOGIC AG
J7L
LCD connector
VGA-LCD Interface (flatpanel signals):
Signals P20-P23 are located on the J7M connector
Pin
Signal
1
M / DE Signal
3
P18
5
VCC-LCD (1A),
Selected by J51
7
VEESAVE (5V/1A)
9
VBACKSAVE (12V/1A)
11
P2
13
P1
15
P0
17
Contrast resistor pin 1 *)
19
Contrast resistor pin 2 *)
21
P4
23
P8
25
P10
27
P12
29
P14
Rem:
Pin 9 (+12V) will be supplied from J48 (pin 4) or J40 (pin B9).
-
*)
Contrast electronics is not assembled
Contrast is reserved to be controlled via INT15 in later bios versions.
-
Pin
Signal
2
FLM
4
Line Pulse LP
6
GND
8
Shift Clock
10
P3
12
P17
14
P16
16
P7
18
P6
20
P5
22
P19
24
P9
26
P11
28
P13
30
P15
82
MSM586SEN/SEV Manual V1.5E
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