Ide Interface Connectors - NEC POWERMATE P60D Service Manual

A-10 Connector Pin Assignments

IDE Interface Connectors

All signal levels in the IDE interface are TTL compatible. A logic 1 is a signal whose volt-
age level is between 2.0 and 5.0 V. A logic 0 is a signal measuring between 0.00 V and
0.70 V.
The two system board IDE connectors are physically identical. Electrically the local bus
IDE connector (P8) is faster. Table Appendix A-10 provides the IDE pin assignments. All
signals on the Host interface have the prefix HOST. All negatively active signals are further
prefixed with a "–" designation. All positively active signals are prefixed with a "+" desig-
nation.
Table Appendix A-10 IDE Connector Pin Assignments
Pin
01
03
05
07
09
11
13
15
17
19
21
23
25
27
29
31*
33
35
37
39
*The Fast IDE connector uses IRQ15
(P8/P14)
Signal Pin
–HOST RESET 02
+HOST DATA 7 04
+HOST DATA 6 06
+HOST DATA 5 08
+HOST DATA 4 10
+HOST DATA 3 12
+HOST DATA 2 14
+HOST DATA 1 16
+HOST DATA 0 18
GND 20
DRQ3 22
–HOST IOW 24
–HOST IOR 26
IOCHRDY 28
–DACK3 30
+HOST IRQ14 32
+HOST ADDR 1 34
+HOST ADDR 0 36
–HOST CSO 38
–HOST SLV/ACT 40
Signal
GND
+HOST DATA 8
+HOST DATA 9
+HOST DATA 10
+HOST DATA 11
+HOST DATA 12
+HOST DATA 13
+HOST DATA 14
+HOST DATA 15
KEY
GND
GND
GND
+HOST ALE
GND
–HOST IO16
GND
+HOST ADDR 2
–HOST CS1
GND