Omron CP1H-CPU - 05-2006 Operation Manual page 639

Cp1h cpu unit
Table of Contents

Advertisement

PLC Setup
Name
2
2-2
NT Link (1:N)
2-2-1
Baud
2-2-2
NT/PC
Link Max:
Highest
unit num-
ber
2-3
RS-232C
2-3-1
Baud
2-3-2
Format
(data
length,
stop bits,
parity)
2-3-3
Start Code Disable.
2-3-4
Start Code 00 hex0x0000
2-3-5
End Code
2-3-6
Received
Bytes
608
Default
Settings
9,600
38,400 (standard)
(disabled)
115,200 (high speed)
0
0
:
7
9600 bps
300 bps
600 bps
1,200 bps
2,400 bps
4,800 bps
9,600 bps
19,200 bps
38,400 bps
57,600 bps
115,200 bps
7,2,E: 7-bit
7,2,E: 7-bit data, 2 stop
data, 2 stop
bits, even parity
bits, even parity
7,2,O: 7-bit data, 2 stop
bits, odd parity
7,2,N: 7-bit data, 2 stop
bits, no parity
7,1,E: 7-bit data, 2 stop
bits, even parity
7,1,O: 7-bit data, 1 stop
bit, odd parity
7,1,N: 7-bit data, 1 stop
bit, no parity
8,2,E: 8-bit data, 2 stop
bits, even parity
8,2,O: 8-bit data, 2 stop
bits, odd parity
8,2,N: 8-bit data, 2 stop
bits, no parity
8,1,E: 8-bit data, 1 stop
bit, even parity
8,1,O: 8-bit data, 1 stop
bit, odd parity
8,1,N: 8-bit data, 1 stop
bit, no parity
Disable.
Set.
0x0000
:
0x00FF
Received
Received Bytes: Receive
Bytes: Receive
specified number of
specified num-
bytes.
ber of bytes.
CR,LF
Set End Code
256 bytes
256 bytes
1 byte
:
255 bytes
When setting is read
Internal
by CPU Unit
address
Every cycle
161
Every cycle
166
Every cycle
161
Every cycle
160
Every cycle
165
Every cycle
164
Every cycle
165
Every cycle
165
Appendix G
Bits
Settings
00 to
00 hex
07
0A hex
00 to
0 hex
03
:
7 hex
00 to
01 hex
07
02 hex
03 hex
04 hex
05 hex
00 or
06 hex
07 hex
08 hex
09 hex
0A hex
00 to
0 hex
03
1 hex
2 hex
4 hex
5 hex
6 hex
8 hex
9 hex
A hex
C hex
D hex
E hex
12
0
1
08 to
00 hex
15
:
FF hex
08 and
00
09
10
01
00 to
00 hex
07
01 hex
:
FF hex

Advertisement

Table of Contents
loading

Table of Contents