Time-Based Timer Operations - Fujitsu F2MC-16LX Hardware Manual

8.3

Time-Based Timer Operations

The time-based timer functions as a timer for waiting for an oscillation stabilization
time of a watchdog timer clock source, main clock, and PLL clock and as an interval
timer for generating an interrupt in a given cycle.
■ Time-based Timer Operations
The time-based timer consists of an 18-bit counter for counting oscillation inputs that are the
origin for creating machine clocks. The timer continues the count operation while oscillation is
input.
The time-base counter is cleared by power-on reset, a transition to the stop mode or hardware
standby mode, a transition from the main clock to the PLL clock by the MCS bit in the CKSCR
register, or by writing "0" in the TBR bit of the TBTC register.
The watchdog timer and interval interrupts that use time-based timer outputs are influenced by
time-based timer clear.
■ Interval Interrupt Function
This function generates an interrupt in a give cycle with a carry signal of the time-base counter.
The TBOF flag is set for each interval time set by TBC1 and TBC0 bits in the TBTC register.
This flag is set on the basis of the time the time-based timer was last cleared.
When the main clock mode changes to the PLL clock mode, the time-based timer is cleared
because the time-based timer is used to wait for the oscillation stabilization of the PLL clock.
When the stop mode or hardware standby mode is entered, the TBOF flag is cleared
simultaneously with mode transition because the time-based timer is used to wait for the
oscillation stabilization time at return.
8.3 Time-Based Timer Operations
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