Image Process Asic - Sharp AR-M207 Service Manual

No. SIGNAL In/Out
96 PF0/BREQ Out
97 P50/TxD2/IRQ4 Out
98 P51/RxD2/IRQ5
99 Vss GND
100 Vss GND
101 P52/SCK2/IRQ6
102 P53/ADTRG/ Out
IRQ7/WAIT/
BREQO
103 Avcc 3.3V
104 Vref 3.3V
105 P40/AN0
106 P41/AN1
107 P42/AN2
108 P43/AN3
109 P44/AN4
110 P45/AN5
111 P46/AN6/DA0
112 P47/AN7/DA1
113 Avss GND
114 Vss GND
115 P17/PO15/ Out
TIOCB2/TCLKD
(3) Image process ASIC (HG73C141HFV)
a. General
The ASIC is composed of the three major blocks: the image process section, the print control section, and the I/F section.
•Image process section:
With image data from the CCD PWB in the operation mode determined by the register setup, shading, AE process, input γ correction, area separation,
filter process, resolution conversion, zoom process, output γ correction, binary conversion (error diffusion, dither method, simple binary conversion) are
performed.
•Print control section:
When copying, the image-processed data are outputted to the LSU according to the LSU writing timing. When scanning, the image data are made into
8bit width and outputted to the I/F section (USB).
•I/F section:
Controls the DRAM which is the image data buffer, and processes data send/receive between the USB I/F and the IEEE1284 I/F.
The ASIC is controlled by writing the operation mode and the necessary setup values of the operation mode into the ASIC control register before
starting each operation. (For ASIC Pin configuration, refer to the table at the end of this document.)
Scan start
CCD
PWB
DESCRIPTION
151 Selector Signal
IMC2 Status Transmission
In IMC2 Status Reception
Ground
Ground
In IMC2 Status Transmission
Enable
IMC2 Status Reception Ready
A/D Power
A/D Reference
In Thermistor Analog Input
In SPF Wide Sensor
In 151 Selector Input
In 151 Selector Input
In 151 Selector Input
In 151 Selector Input
In Not use
In Analog Input(TC)
Ground
Ground
Scan stop Signal
ASIC
Image process section
Resolution conversion,
Zooming, lmage
process circuit
AR-M207 M165 M162 ELECTRICAL SECTION 13-3
No. SIGNAL
116 P16/PO14/
TIOCA2
117 P15/PO13/
TIOCB1/TCLKC
118 P14/PO12/
TIOCA1
119 P13/PO11/
TIOCD0/TCLKB
120 P12/PO10/
TIOCC0/TCLKA
121 P11/PO9/
TIOCB0/DACK1
122 P10/PO8/
TIOCA0/DACK0
123 MD0
124 MD1
125 MD2
126 PG0/CAS
127 PG1/CS3
128 PG2/CS2
Print control section
Print data process circuit
PRINT control
DRAM control
ASIC control resistor
I/F section
DRAM
8MB or 16MB
In/Out DESCRIPTION
Out Scan start Signal
Out Trans start Signal
Out Polygon Motor Clock
Out SPF Motor Drive
Out SPF Motor Drive/Mirror Motor
Step count
Out SPF Motor Drive
Out SPF Motor Dribe
GND CPU Mode Control
Input(Mode4)
GND CPU Mode Control
Input(Mode4)
Pull-Up CPU Mode Control
Input(Mode4)
Out Not use
Out ChipSelect for I/O ASI
Out ChipSelect for ASIC
LSU
HSYNC
VSYNC
To CPU bus