Circuit Descriptions; Main Pwb (Mcu); Cpu Signal Table - Sharp AR-M207 Service Manual

2. Circuit descriptions

A. Main PWB (MCU)
(1) General
The MCU PWB is composed of:
• CPU peripheral sections which perform mechanical sequence control
and function job management
• Image process ASIC which performs image process, CCD control, LSU
control, and print control
• Motor control circuit
• Mechanical load, sensor I/O circuit
It controls the processes for copying, the transport loads, fusing, the
optical system, the operation panel, and the option PWB.
(2) CPU signal table (H8S/2321)
No. SIGNAL In/Out
1 PG3/CS1 Out
2 PG4/CS0 Out
3 Vss GND
4 NC GND
5 Vcc 3.3V
6 PC0/A0 Pull-Up
7 PC1/A1 Out
8 PC2/A2 Out
9 PC3/A3 Out
10 Vss GND
11 PC4/A4 Out
12 PC5/A5 Out
13 PC6/A6 Out
14 PC7/A7 Out
15 PB0/A8 Out
16 PB1/A9 Out
17 PB2/A10 Out
18 PB3/A11 Out
19 Vss GND
20 PB4/A12 Out
21 PB5/A13 Out
22 PB6/A14 Out
23 PB7/A15 Out
24 PA0/A16 Out
25 PA1/A17 Out
26 PA2/A18 Out
27 PA3/A19 Out
28 Vss GND
29 PA4/A20/IRQ4 Pull-Up
30 PA5/A21/IRQ5
31 PA6/A22/IRQ6
32 PA7/A23/IRQ7
33 P67/IRQ3/CS7
34 P66/IRQ2/CS6
35 Vss GND
36 Vss GND
37 P65/IRQ1
38 P64/IRQ0
39 Vcc 3.3V
40 PE0/D0 In/Out
41 PE1/D1 In/Out
42 PE2/D2 In/Out
43 PE3/D3 In/Out
44 Vss GND
45 PE4/D4 In/Out
DESCRIPTION
ChipSelect for SRAM
ChipSelect for ROM
Ground
Ground
Power
Address Bus
Address Bus
Address Bus
Address Bus
Ground
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Ground
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Ground
Address Bus
In EXT-PCB Wake Up Interrupt
In SPF Paper Detect Interrupt
In ASIC Interrupt
In Mirror Home Position Interrupt
In ASIC Interrupt
Ground
Ground
In Zero Cross Interrupt
In ASIC Interrupt
Power
Data Bus
Data Bus
Data Bus
Data Bus
Ground
Data Bus
AR-M207 M165 M162 ELECTRICAL SECTION 13-2
No. SIGNAL In/Out
46 PE5/D5 In/Out
47 PE6/D6 In/Out
48 PE7/D7 In/Out
49 PD0/D8 In/Out
50 PD1/D9 In/Out
51 PD2/D10 In/Out
52 PD3/D11 In/Out
53 Vss GND
54 PD4/D12 In/Out
55 PD5/D13 In/Out
56 PD6/D14 In/Out
57 PD7/D15 In/Out
58 Vcc 3.3V
59 P30/TxD0 Out
60 P31/TxD1 Out
61 P32/RxD0 In/Out
62 P33/RxD1
63 P34/SCK0 Out
64 P35/SCK1 In
65 Vss GND
66 P60/DREQ0/ Out
CS4
67 Vss GND
68 Vss GND
69 P61/TEND0/ In
CS5
70 P62/DREQ1 Out
71 P63/TEND1 Out
72 P27/PO7/ Out
TIOCB5/TMO1
73 P26/PO6/ Out
TIOCA5/TMO0
74 P25/PO5/ Out
TIOCB4/TMCI1
75 P24/PO4/
TIOCA4/TMRI1
76 P23/PO3/ Out
TIOCD3/TMRI0
77 P22/PO2/ Out
TIOCC3/TMRI0
78 P21/PO1/ Out
TIOCB3
79 P20/PO0/ Out
TIOCA3
80 WDTOVF Pull-Up
81 RES In
82 NMI Pull-Up
83 STBY Pull-Up
84 Vcc 3.3V
85 XTAL 19.6608MHz System Clock
86 EXTAL 19.6608MHz System Clock
87 Vss GND
88 PF7/fai Pull-Up
89 Vcc 3.3V
90 RF6/AS Out
91 RD Out
92 HWR Out
93 PF3/LWR Out
94 PF2/LCAS/ Out
WAIT/BREQO
95 PF1/BACK Out
DESCRIPTION
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Ground
Data Bus
Data Bus
Data Bus
Data Bus
Power
CRUM I2C Bus Control
For Debug
12C Bus DATA
Option Cassette Detect Signal
12C Bus Clock
USB Detect Signal
Ground
Not use
Ground
Ground
Flash ROM Ready/Busy
Outconnect telephone control
USB I/F Control
Not use
Power OFF Signal
Print Start Signal
Duplex Motor Drive
Duplex Motor Drive
Duplex Motor Drive
Duplex Motor Drive
Watchdog Timer Over flow
Reset Input
NMI Interrupt
Stand-by
Power
Ground
System Clock
Power
Software Reset Signal
Read Enable
High Write Enable
Low Write Enable
151 Selector Signal
151 Selector Signal