Kb/Ms/Lpc/Gpio/Smbus Combination Pin Header - VIA Technologies EPIA-P910 User Manual

Pico-itx embedded board
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2.2.4. KB/MS/LPC/GPIO/SMBus Combination Pin Header

The mainboard includes one KB, MS, LPC, GPIO and SMBus combination pin
header block labeled as "CN1". The combination pin header is for connecting
KB, MS, LPC, General Purpose Input and Output and SMBus devices. The
pinout of the pin header is shown below.
Figure 12
Figure
12: KB/MS/LPC/GPIO/ SMBus combination pin header
: KB/MS/LPC/GPIO/ SMBus combination pin header
Figure
Figure
12 12
: KB/MS/LPC/GPIO/ SMBus combination pin header
: KB/MS/LPC/GPIO/ SMBus combination pin header
Pin
Pin
Pin
Pin
1
3
5
7
9
11
13
Signal
Signal
Signal
Signal
LAD3
LAD2
LAD1
-LFRAME
LAD0
-PCIRST
SMBDT_+3.3V
EPIA- - - - P910
EPIA
EPIA
EPIA
Pin
Pin
Signal
Signal
Pin
Pin
Signal
Signal
2
GND
4
SIO_CLK1
6
PCICLK3
8
-LDRQ0
10
SERIRQ
12
GND
14
SMBCK_+3.3V
P910 User Manual
User Manual
P910
P910
User Manual
User Manual
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