Terminal Functions - Texas Instruments TMS320C6474 Manual

Multicore digital signal processor
Hide thumbs Also See for TMS320C6474:
Table of Contents

Advertisement

TMS320C6474
SPRS552F – OCTOBER 2008 – REVISED JULY 2010
2.7

Terminal Functions

The terminal functions table
I/O/Z), whether the pin has any internal pullup/pulldown resistors, and the signal function description.
SIGNAL
NAME
NO.
AIFRXN0
AF22
AIFRXP0
AF21
AIFRXN1
AG20
AIFRXP1
AG21
AIFRXN2
AG18
AIFRXP2
AG17
AIFRXN3
AE17
AIFRXP3
AE18
AIFRXN4
AE14
AIFRXP4
AE13
AIFRXN5
AF12
AIFRXP5
AF13
AIFTXN0
AE21
AIFTXP0
AE22
AIFTXN1
AD21
AIFTXP1
AD20
AIFTXN2
AF16
AIFTXP2
AF17
AIFTXN3
AD17
AIFTXP3
AD16
AIFTXN4
AG13
AIFTXP4
AG14
AIFTXN5
AD13
AIFTXP5
AD12
NMI0
J4
NMI1
J2
NMI2
J1
XWRST
AD5
RESETSTAT
AF4
POR
AE5
SYSCLKP
AE9
SYSCLKN
AE10
ALTCORECLKN
AF10
ALTCORECLKP
AF9
DDRREFCLKN
AD23
DDRREFCLKP
AD24
SYSCLKOUT
AD6
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
(2) IPD = internal pulldown, IPU = internal pullup. All internal pullups and pulldowns are 100 mA.
26
Device Overview
(Table
2-5) identifies the external signal names, the pin type (I, O, O/Z, or
Table 2-5. Terminal Functions
(1)
(2)
TYPE
IPD/IPU
ANTENNA INTERFACE
I
I
I
I
I
I
Antenna Interface Receive Data (6 links)
I
I
I
I
I
I
O
O
O
O
O
O
Antenna Interface Transmit Data (6 links)
O
O
O
O
O
O
CLOCK/RESETS
I
IPD
Non-maskable interrupts. NMI0, NMI1, and NMI2 pins are mapped to C64x+
Megamodule Core 0, C64x+ Megamodule Core 1, and C64x+ Megamodule Core
I
IPD
2, respectively. NMIs are edge-driven (rising edge). Any noise on the NMI pin
I
IPD
may trigger an NMI interrupt; therefore, if the NMI pin is not used, it is
recommended that the NMI pin be grounded rather than relying on the IPD.
I
Warm Reset
O
Reset Status Output
I
Power-on Reset
I
System Clock Input to Antenna Interface and main PLL (Main PLL optional vs
ALTCORECLK)
I
I
Alternate Core Clock Input to main PLL (vs SYSCLK)
I
I
DDR Reference Clock Input to DDR PLL
I
System Clock Output to be used as a general purpose output clock for debug
O/Z
IPD
purposes
Submit Documentation Feedback
Product Folder Link(s)
SIGNAL DESCRIPTION
Copyright © 2008–2010, Texas Instruments Incorporated
:TMS320C6474
www.ti.com

Advertisement

Table of Contents
loading

Table of Contents