Intel 2920 Design Handbook page 128

APPENDIX
2920 INPUT/OUTPUT REQUIREMENTS
Instructions Required
Clock Rate
Analog 110 Instruction Time Required 1 MHz 5MHz 10MHz
IN(K)
2400ns
1 3
6
NOP's between
converts 560ns 1 1 2
NOP's aller IN(K)
sequence 1 1 1
ADD DAR, KM2, ROO,
CND6 yes yes yes
NOP's aller LOA DAR 2400ns 1 3 6
OUT(K) 3600ns 1 5 9
WORKSHEET #2 I/O INSTRUCTIONS
DATA CALCULATIONS
#
Instruchonsl
Conver· Clock
1/0
#
Input
# Output Total # 1/0
slCn Speed
Input Output
Opera Opera Instruc-
Accuracy lions
lions tlons
9 Bits 10MHz 33
15
(54dB) 5MHz 22
8
I MHz 20 2
6 Bits IOMHz 24 15
(36dB) 5MHz 16
8
IMHz
14 2
I Bit IOMHz 6 15
Serial 5MHz 4
8
Digital
110 IMHz 3 2
TOTAL
WORKSHEET #32920 FINAL WORKSHEET
2920 APP 111 APP 112 APP #3 APP #4
Dynamic
Range
.. 54dB
Bandwidth
.. y, Sample Rate
# Instructions
1/0 .. 192
Digital .. 192
1/ RAM
Locations
.. 40
II Inputs .. 4
1/ Outputs
.. 8
A-5
The number of instructions for an input sequence is equal
to the overhead plus 3 instructions per bit for parts operating
faster than 5 MHz and 2 instructions per bit for parts operating
at 5 MHz and below_