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APPLICATION EXAMPLES
ISIS-II 2920 ASSEMBLER XI02
PAGE
2
LINE
LOC OBJECT SOURCE STATEMENT
53
54
55
i*****SWEEP OSC*****
56
57
58
42 4C9A6F LOA Sl.
KP5.
R12
i
DEFINE Sl
59
43 4C92DF LOA M.
KP4.
LOl
i
DEFINE M
60
44 4A40EB SUB Fl.
Sl.
ROO
61
45 4064EF LOA DAR.
Fl.
ROO
62
46 7A48ED ADD F1.
M.
ROO. CNDS
63
47 4ACAF5 LIM SWP.
KP7.
ROO
64
48 4060FB SUB SWP.
Fl.
ROO
i
INVERT SLOPE
65
49 406CEF LOA DAR.
SWP.
ROO
i
SWEEP TO DAR TO OUTPUT
66
50 48CE8A SUB DAR.
KP5.
R05
67
51 78C6CD ADD DAR.
KP4.
L01. CNDS
i
10 MS DELAY FOR FILTER RISE TIMES
68
52 44602E LOA F2.
F1.
R02. NOP
iSAWTOOTH SCALING
69
53 4460AA SUB F2.
Fl.
R06. NOP
70
54 46606B SUB F2.
F2.
R12. NOP
71
55 4460EA SUB F2.
Fl.
R08. NOP
72
56 4000EF NOP
73
57 4000EF NOP
74
58 86CA3E LOA S2.
KP3.
R02. OUTO
• DEFINE 52
75
59 86CABC ADD 52.
KP3.
R06. OUTO
76
60 84CAID ADD 52.
KPl.
R09. OUTO
77
61 8668ED ADD F2.
52.
ROO. aUTO
iADD OFFSET
78
79
80
i*****vca*****
81
82
83
62 8000EF aUTO
84
63 8270EB SUB aSC1. F2.
ROO. OUTO
85
64 4864EF LDA DAR.
aSC1, ROO
86
65 7A58ED ADD OSC1. M.
ROO. CNDS
87
66 4870FF LDA OSC,
OSCI, ROO
88
67 4A581A SUB OSC,
M,
ROl
89
68 4878D7 ABS OSC,
OSC,
LOl
90
69 4A581A SUB OSC,
M,
ROl
91
70 4064EF LDA DAR,
Fl,
ROO
92
71 70D2EF LDA OSC1, KPO,
ROO, CNDS
i
SET VCO TO o TO SYNC WITH SWEEP
93
72 4878DD ADD OSC,
OSC,
LO!
i
VCO OUTPUT IN OSC
94
95
96
.******MULTIPLY*****
97
98
99
73 4E70EB SUB MPL1. MPL!. ROO
iCLEAR MULTIPLY OUTPUT REGISTER
100
74 486CEF LOA DAR,
OSC,
ROO
iLOAD DAR WITH MULTIPLIER
101
75 FD580e ADD MPL1, MPL2, ROl. CND?
102
76 ED582C ADD MPLl, MPL2, R02, CND6
103
77 DD584C ADD MPL1. MPL2, R03, CND5
104
78 CD586C ADD MPL!. MPL2, R04, CND4
105
79 BD588C ADD MPL1. MPL2, R05, CND3
106
80 AD58AC ADD MPL1. MPL2. R06, CND2
Figure 7-14. Complete Spectrum Analyzer Assembly Listing (Cont'd.)
7-13
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