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CHAPTER 2
SAMPLED DATA SYSTEMS
2:0 SAMPLED DATA SYSTEMS
Sampled data systems can be implemented using either
analog or digital processing techniques, or both. Figure
2-1 shows two different types of sampled data systems:
sampled analog system and sampled analog/digital
system. Examples of sampled analog systems include
transversal filters using CCD or bucket brigade shift
registers analog weighted-taps and switched capacitor
techniques to implement a filter characteristic. The
identical systems can also be implemented using digital
instead of analog processing. Such systems are referred
to as digital sampled data systems. This type of system
can be implemented with the 2920 Signal Processor.
This chapter will discuss the various elements that com-
prise a digital sampled data system and also look at the
design considerations in representing a continuous
analog signal with digital sampled data techniques.
2.1 Elements of a Digital Sampled Data
System
The block diagram shown in Figure 2-2 illustrates the
basic blocks of a general purpose sampled data system
using a digital signal processor. In this configuration it
is assumed that both the input and output signals are
analog. This is not a necessary condition since digital
signals can be considered a special type of analog signals
and processed accordingly. Elements of the block
diagram are discussed below.
The system in Figure 2-2 operates on the input analog
signal using the indicated components in sequence:
•
Anti-Aliasing Filter-This filter is used to bandlimit
the incoming analog signal prior to sampling; thus a
continuous analog filter is used. This minimizes
possible distortion terms (aliasing noise) which
could arise from signal frequencies that are too high
relative to the sample rate (Section 2-2).
•
Input Sample and Hold (S&H)-The filtered input
signal is then sampled at a fixed rate determined by
the digital processor. Each resulting sampled
amplitude is held long enough for subsequent pro-
cessing (such as analog-to-digital conversion).
2-1
Analog-to-Digital
Converter (A/D)-The
held
analog voltage is converted to a digital word. This
digital word then represents the sampled input
signal voltage. (Since the processor must operate on
individual
digital
words,
it
is
necessary
to
characterize the continuous analog input signal by
discrete digital words which retain the information
of the original signal.)
•
Digital Processor-Each digitized sample is now
processed by the digital processor, which has been
programmed to perform a predetermined algo-
rithm. Typically, a general microprocessor can be
programmed to perform any funciton, but the
resulting execution time is too limiting for most
analog applications. The 2920 eliminates this pro-
blem because its architecture is configured to take
advantage of serial repetitive signal processing,
while at the same time preserving many of the
advantages of the general purpose microprocessor.
Digital-to-Analog
Converter (D/ A)-The
pro-
cessed digital words are converted back to analog
using the D/ A. Again, the analog signal is approx-
imated by discrete amplitude levels (as in the A/D).
In addition, the D/ A sampled output weights the
signal output in the frequency domain by sin(x)/x,
thereby causing some signal distortion (Section
2-2).
•
Output Sample-and-Hold (S&H)-One method of
reducing the output frequency distortion is to widen
the sin(x)/x rolloff by resampling the output signal
using a very narrow sample width. The S&H takes
the D/ A held output and res am pies it with narrow
pulses. Another use of an output S&H is to store
values when several outputs are multiplexed during
a single sample period.
•
Reconstruction Filter-Since the desired output
signal is a continuous representation of the pro-
cessed input signal, it is necessary to remove high
frequency components resulting from the D/ A or
sample-and-hold outputs. This, in effect, smooths
the analog output from sample to sample. A
lowpass filter is used to perform the signal
"reconstruction". This filter can also be used to
compensate for the sin(x)/x frequency rolloff of the
D/ A or S&H (Section 2-2).
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