Intel 2920 Design Handbook page 77

ADVANCED TECHNIQUES
6.2 Noise Generation With The 2920
Some signal processing applications call for a source of
noise. A noise generator may be modeled by a pseudo-
random number generator. The 2920 realization shown
in Table 6-2 is implemented by a feedback shift register,
using only one variable location. The shift operation is
realized by loading the number to itself shifted appro-
priately. The exclusive-or operation (XOR) is used to
generate the bit to be entered into the shift register
which is done by the addition operation.
6.3 Digitallnput/Output
If parameters used in the 2920 need to be transferred on
or off the chip, an analog voltage is the natural way to
represent the parameter. An example has been shown
for a voltage controlled variable frequency oscillator.
However, in many applications, the source or receiver
of the parameter requires a digital representation.
Various signals in and out of the 2920 and its processing
power can be used to provide digital 110. This section
will describe some of the techniques, important issues in
the choice of techniques and some examples.
A variety of methods are useful for digital 110. The
choice will depend on knowing some of the following
for your application; The maximum data rate, how
many bits per second, per sample period, or per pro-
gram pass? Some methods are faster in continuous bit
rate. How often does data change? Can a buffer and a
slow data rate be used because the data changes infre-
quently? What is the natural format of the data; bit
serial or parallel, for example? What controls the
transfer? Is the 2920 the master or the slave in the 110
process? Is the transfer synchronous or non-
synchronous with the 2920 program execution? What
resources are available on the 2920 for digital 110 after
the main function has been accomplished; how many
SIGIN or SIGOUT pins are free? How much program
space is available for digital 110 or what is the composi-
tion of the main program; is it easier to add more digital
or more analog instructions?
Typically an I/O transfer has the data bit representing a
binary one or zero, a clock or activating signal and one
or more control signals. The resources on the 2920 for
possible use in these three functions are:
SIGIN(K). These four pins provide the only possible
inputs (other than the RESET which is useful only for
the control function). A sequence of IN(K) and CVT(K)
Table 6-2. Noise Generator Routine
; Random noise generator using feedback shift register.
; Register length is 17 bits.
; First test for all zeros condition-ensure proper start.
; TEMP is temporarily used variable, NGEN is generator output.
LDA
SUB
LDA
LDA
TEMP,
TEMP,
DAR,
TEMP,
NGEN,
KP1,
TEMP,
KP4,
Ll
R13
CNDS
; Next fetch the 17th bit, test and move to DAR
LDA
AND
SUB
LDA
TEMP,
TEMP,
TEMP,
DAR,
KP1,
NGEN,
KP1,
TEMP
R13
Ll
R13
; test subtraction, negative result implies need for initialization-
; move to DAR for sign test, init if neg.
; Test subtraction to convert bit to sign; set DAR to
+
1.0 for 1,
; -1.0
for
0
Next bit of shift register is XOR of bits 17 and bit
5
XOR DAR, NGEN
Shift register right, and fill in new value
LDA
ADD
NGEN,
NGEN,
NGEN,
KP4,
Rl
CNDS
; generate in DAR
shift right
6-4