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APPLICATION EXAMPLES
Six linear sections are used to approximate the log
amplifier. The equations for these sections and the
range of inputs for which each equation used are given
in Figure 7-4. The equations were obtained graphically,
and then adjusted for coding efficiency. The input for
the log amplifier must be positive and less than or equal
to 1 V. To simplify matters, the endpoints for the linear
sections were chosen as powers of two. This way, only
one bit of the number to be processed need be checked
to determine whether that number falls within an input
range. The constant multipliers (slopes) of the linear
sections were chosen to minimize error while at the same
time allowing the multiplications to be efficiently
handled in 2920 code.
The outputs for the log amplifier are also less than or
equal to 1 V, and positive. An output of 1 V corresponds
to 0 dB, 0.8V to -10 dB, 0.6V to -20 dB, and so on. An
output of
OV
corresponds to
-50
dB or below. For
example, for a device with a maximum output of 1 V, an
output of 0.7V indicates a signal level of -15 dB.
Regardless of VREF., a 2920 output which is 70 percent
***LOG AMP*****
of full scale represents -15 dB. Any DC offset which
may exist at the output of the part should be taken into
account when interpreting the output in dB.
The equations used in the log amplifier program are
shown in Figure 7-4, and the assembly code is given in
Figure 7-5. The first linear section of the amplifier to be
implemented is the sixth section, which corresponds to
inputs less than 1
132V.
However, all input signals,
regardless of amplitude, are processed by the equation
for this section initially. The original signal is then
placed in the DAR. All the following operations are
conditional, and are performed only if the tested bit of
the DAR is a "one". Otherwise, a NOP is performed.
Each bit of the DAR is tested, starting with bit 3 and
progressing to bit 7. When a "one" is located, the
multiplier and offset corresponding to the indicated
range of the output are used to compute the result. This
result replaces any previously computed result. If no
"ones" are encountered, the input is less than 1I32V,
and only NOP's are performed. The value computed for
the sixth section then remains unmodified. Since the
ABS XO. XO, ROO
,PREVENT PROCESSING OF NEGATIVE NUMBERS
,
SECTION 6
LDA LOUT, XO, L02
ADD LOUT, XO, LO.:!
ADD LOUT, XO, L02
ADD LOUT, XO, RO I
ADD LOllT, XO. R02
LDA DAR, XO, ROO
,
SECTION 5
LDA LOUT, XO, L02, CND3
ADD LOUT, KP2, ROO, CND3
ADD LOUT. KP5, ROS, CND:3
,
SECTION 4
LDA LOUT, XO, LOI, CND4
ADD LOUT. KP3, ROO, CND4
ADD LOUT. KP2, R04, CND4
,
SECTION:3
LDA LOUT, XO, ROO, CND5
ADD LOUT, KP4, ROO,
CND~
ADD LOUT, KP2, R04, CNDS
,
SECTION 2
LDA LOUT, XO, ROI, CND6
ADD LOUT, KP5, ROO, CND6
ADD LO\JT, KP2. R04, CND6
,
SECTION I
LDA LOUT, XO, ROJ, CND7
ADD LOUT. XO, R04, CND7
ADD LOUT, XO, R05, eND7
ADD LOUT, KP6, ROO, CND7
ADD LOUT, KP4, R04, CND7
LDA DAR, LOUT, ROO
,LOUT = I;> 75(XO)
,
0 < XO < 0 03125
,TRANSFER INPUT TO DAR TO DO CONDITIONAL ARITHMETIC
, LOUT = 4(XQ) + 0 270
•
0 03125 .: XO
<
0
062~
,LOUT
= 2(XO) + 0 391
,
00625
<
XO
<
0125
,LOUT=XO+0516,012S<XO<025
,LOUT = 0 5(XO) +0641
,
025<XO<05
,LOUT = 0 219 (XO) + 0 781
,
0 5 .: XO < I
, TRANSFER RESULT TO DAR TO OUTPUT OR OTHER
,REGISTER FOR FURTHER PROCESSING
Figure 7-5. Piecewise Linear Log Amplifier Program
7-4
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