Intel 2920 Design Handbook page 68

SUMMARY OF FILTER CHARACTERISTICS
Table 5-4. Implementation of Submultiple
Sampling
; Oscillator
SUB
OSC, KPl, R05, subtract constant
KPI fromOSC
LOA DAR, OSC, ROO, move to DAR
for sign test
LOA OSC, KP3, ROO, CNDS re-initialize if
negative to
ADD OSC, KP3, R05, CNDS ; 99 times KP 1
; conditional filter
implementation
LOA
Y2, Yl, ROO, CNDS delay occurs only
on cycling
LOA
Yl,
YO, ROO, CNDS ; of oscillator
; remainder of filter calculations are done uncondi-
; tionally - result is valid only on cycling of oscillator
In the program (Table 5-4) a constant value is sub-
tracted from a RAM location on each pass through the
program. If (and only if) that operation causes the result
to be negative, the condition for re-initializing the
oscillator is met. A conditional LDA (as opposed to
conditional ADD in section 4.2) operation restores the
oscillator to a positive value. Thus the oscillator cycles
at a submultiple of a sample rate (at 1/100 in Table 5-4
,example.)
The filter itself is realized using the same equations as
are used in any second order section, with the exception
that the delay realization operations, i.e., loading Yl to
Y2 and YO and Yl, are performed only on those progrm
passes which re-initialize the oscillator. Because the
oscillator calculations only produce re-initialization
every nth cycle, a sample rate has been achieved equal to
the 2920 sample rate divided by n.
5.6.7 Filters at a Multiple of the Sampling Rate
On occasion, it may be desirable to implement filters at
frequencies too high for the basic program sampling
rate or to operate one or more stages of the filter at a
higher sample rate than that of the 2920. For example, it
may be possible to use a lower cost external anti-aliasing
filter by sampling the inputs at a higher than normal
rate, and performing some of the anti-aliasing using a
5-17
digital filter stage operating at this higher rate. Subse-
quent processing of the data is performed at the
nominal rate of the 2920.
One means for achieving the higher sample rate is to use
two copies each of the sampling routine and the anti-
alias digital filter section. Figure 5-18 shows the impact
on the external anti-alias requirements obtained by
using the double sample rate technique. External anti-
alias requirements may also be reduced for 2920 outputs
by the use of interpolating digital filters, i.e., filters
which compute values between successive samples.
Interpolating filters may also be realized by operating a
filter stage at twice the sample rate by using two copies
of the program within the 2920. There are two options
for the input of such a filter operating at twice the sam-
ple rate. The same input sample may be used for both
copies of the program, or one copy may use a zero-
valued input. The latter case resembles using an impulse
source where the former case is more like a sampled and
held source. The Signal Processor Application
Software/Compiler can be used to produce code for this
mixed sample rate implementation. The methods pro-
duce somewhat different frequency responses.
5.6.8 Other Filter Structures
In most of the examples described above, a cascade of
filter stages has been assumed. However, when the
impulse invariant transform is used, an alternate
realization could be found by expanding into a sum of
partial fractions, evaluating the impulse response
associated with each fraction, and realizing the output
of the filter as the sum of the section outputs. The
resulting realization is shown in Figure 5-19b as opposed
to the cascade structure of Figure 5-19a. In some cases,
the parallel structure may be less sensitive to variable
scaling than the cascade structure.