Table of Contents
Advertisement
GD82559ER — Networking Silicon
6.2.2
10BASE-T Transmit Blocks
6.2.2.1
10BASE-T Manchester Encoder
After the 2.5 MHz clocked data is serialized in a 10 Mbps serial stream, the 20 MHz clock
performs the Manchester encoding. The Manchester code always has a mid-bit transition. If the
value is 1b then the transition is from low to high. If the value is 0b then the transition is from high
to low. The boundary transition occurs only when the data changes from bit to bit. For example, if
the value is 10b, then the change is from high to low; if 01b, then the change is from low to high.
6.2.2.2
10BASE-T Driver and Filter
Since 10BASE-T and 100BASE-TX have different filtration needs, both filters are implemented
inside the chip. This allows the two technologies to share the same magnetics. The PHY unit
supports both technologies through one pair of TD pins and by externally sharing the same
magnetics.
In 10 Mbps mode, the PHY unit begins transmitting the serial Manchester bit stream within 3 bit
times (300 nanoseconds) after the MAC asserts TXEN. In 10 Mbps mode the line drivers use a pre-
distortion algorithm to improve jitter tolerance. The line drivers reduce their drive level during the
second half of "wide" (100ns) Manchester pulses and maintain a full drive level during all narrow
(50ns) pulses and the first half of the wide pulses. This reduces line overcharging during wide
pulses, a major source of jitter.
6.2.3
10BASE-T Receive Blocks
6.2.3.1
10BASE-T Manchester Decoder
The PHY unit performs Manchester decoding and timing recovery when in 10 Mbps mode. The
Manchester-encoded data stream is decoded from the RD pair to separate Receive Clock and
Receive Data from the differential signal. This data is transferred to the CSMA unit at 2.5 MHz/
nibble. The high-performance circuitry of the PHY unit exceeds the IEEE 802.3 jitter
requirements.
6.2.3.2
10BASE-T Twisted Pair Ethernet (TPE) Receive Buffer and Filter
In 10 Mbps mode, data is expected to be received on the receive differential pair after passing
through isolation transformers. The filter is implemented inside the PHY unit for supporting single
magnetics that are shared with the 100BASE-TX side. The input differential voltage range for the
Twisted Pair Ethernet (TPE) receiver is greater than 585 mV and less than 3.1 V. The TPE receive
buffer distinguishes valid receive data, link test pulses, and the idle condition, according to the
requirements of the 10BASE-T standard.
The following line activity is determined to be inactive and is rejected:
•
Differential pulses of peak magnitude less than 300 mV
•
Continuous sinusoids with a differential amplitude less than 6.2 V
MHz
•
Sine waves of a single cycle duration starting with 0 or 180° phase that have a differential
amplitude less than 6.2 V
These single-cycle sine waves are discarded only if they are preceded by 4 bit times (400
nanoseconds) of silence.
42
and a frequency of at least 2 MHz and not more than 16 MHz.
pp
and frequency less than 2
pp
Datasheet
Advertisement
Table of Contents
