Status Byte And Service Request (Srq); Figure 4-10 Status Byte And Service Request (Srq); Status Byte Register - Keithley 2010 User Manual

Status Byte and Service Request (SRQ)

Service request is controlled by two 8-bit registers: the Status Byte Register and the Service
Request Enable Register.
Figure 4-10
Status byte and service
request (SRQ)

Status Byte Register

The summary messages from the status registers and queues are used to set or clear the
appropriate bits (B0, B2, B3, B4, B5, and B7) of the Status Byte Register. These bits do not latch,
and their states (0 or 1) are solely dependent on the summary messages (0 or 1). For example, if
the Standard Event Status Register is read, its register will clear. As a result, its summary
message will reset to 0, which in turn will clear the ESB bit in the Status Byte Register.
Bit B6 in the Status Byte Register is one of the following:
•
•
Figure 4-10
Service
* STB?
Request
Generation
Serial Poll
OR
* SRE
* SRE?
The Master Summary Status (MSS) bit, sent in response to the *STB? command,
indicates the status of any set bits with corresponding enable bits set.
The Request for Service (RQS) bit, sent in response to a serial poll, indicates which
device was requesting service by pulling on the SRQ line.
shows the structure of these registers.
Status Summary Messages
RQS
OSB ESB MAV QSB EAV
(B6)
(B2) (B1) (B0)
(B7) (B5) (B4) (B3)
MSS
&
&
&
&
&
OSB ESB MAV QSB EAV
(B2) (B1) (B0)
(B7) (B6) (B5) (B4) (B3)
OSB = Operation Summary Bit
MSS = Master Summary Status
RQS = Request for Service
ESB = Event Summary Bit
MAV = Message Available
QSB = Questionable Summary Bit
EAV = Error Available
MSB = Measurement Summary Bit
& = Logical AND
OR = Logical OR
Remote Operation 4-21
Read by Serial Poll
MSB Status Byte
Register
Read by *STB?
&
MSB Service
Request
Enable
Register