Portregtest - HP Surestore 6164 - Switch Reference Manual

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portRegTest

Synopsis
Availability
Description
174
Bit write/read test of the ASIC SRAMs and registers.
portRegTest
admin
Use this command to verify that SRAM and register data bits in each ASIC
can be independently written and read.
To verify the data bits, write a walking 1 pattern to each location – write a
pattern of
0x00000001
pattern is the same. Shift the pattern one bit to the left (to
and repeat the write, read, and compare cycle. Shift again and repeat until
the last writable bit in register N is reached (
register).
For example, use the following pattern to test a 6-bit register:
1. 0x0001
2. 0x0002
3. 0x0004
4. 0x0008
5. 0x0010
6. 0x0020
7. 0x0040
8. 0x0080
9. 0x0100
10.0x0200
11.0x0400
12.0x0800
to register N, read, and compare to be sure that the
0x80000000
0x00000002
for a 32-bit
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