States In Each Mode During 8-Bit Pwm Timer Operation - Fujitsu Semiconductor Controller MB89950/950A Hardware Manual

7.7

States in Each Mode during 8-bit PWM Timer Operation

This section describes the operation of the 8-bit PWM timer when the device goes to
sleep or stop mode, or an operation halt request occurs during operation.
I Operation during standby mode or operation halt
Figure 7.7-1 "Counter operation during standby mode or operation halt (for interval timer function)" and
Figure 7.7-2 "Operation during standby mode or operation halt (for PWM timer function)" show the
counter value states when the device goes to sleep or stop mode, or an operation halt request occurs, during
operation of the interval timer function or PWM timer function.
The counter halts and maintains its current value when the device goes to stop mode. Operation starts again
from the stored counter value after wake-up from stop mode by an external interrupt. Therefore, the first
interval time or PWM wave cycle does not match the set value. Always initialize the 8-bit PWM timer after
wake-up from stop mode.
G
For interval timer function
Figure 7.7-1 Counter operation during standby mode or operation halt (for interval timer function)
Counter value
TIR bit
TPE bit
PWM pin
(OE = "1")
SLP bit
(STBC register)
STP bit
(STBC register)
* : The PWM pin (PWM) goes to the high-impedance state during stop mode if the pin state specification bit in
the standby control register (STBC: SPL) is "1" ("H" level if pull-up is selected for PWM pin).
When the SPL bit is "0", the pin maintains its value prior to entering stop mode.
COMR value (FF
FF
H
00
H
Timer cycle
Cleared by the program
Wake-up from sleep mode by IRQ2
)
H
Oscillation stabilization
Stop request
delay time
*
Sleep mode
Stop mode
Wake-up from stop mode by an external interrupt.
CHAPTER 7 8-BIT PWM TIMER
Cleared by the operation halt.
Time
Operation halts Operation restarts
"L" while counter is stopped.
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