Fujitsu Semiconductor Controller MB89950/950A Hardware Manual page 109

Table 4.6-3 Port 4 PDR and DDR register function
Register Data
0
Port 4 data
register (PDR4)
1
0
Port 4 data
direction register
(DDR4)
1
R/W: Readable and writable
W: Write-only
X: Indeterminate
-: Unused bit
*: Pins with a pull-up resistor (optional), go to the "H" level
Read
Outputs an "L" level to the pin if
the pin functions as an output
Pin state is the
port.
"L" level.
(Sets "0" to the output latch and
turns the output transistor "ON".)
Sets the pin to the high-
impedance state if the pin
Pin state is the
functions as an output port.
"H" level.
(Sets "1" to the output latch and
turns the output transistor
"OFF".)
Disables the output transistor
--
and sets the pin as an input pin.
Enables the output transistor and
--
sets the pin as an output pin.
Read/
Write
Write
R/W
(*)
W
CHAPTER 4 I/O PORTS
Address Initial value
000E -XXXXXXX
H
000F -0000000
H B
B
95