IBM 88743BU - System x3950 E User Manual page 50

Planning, installing, and managing
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Calgary
Video
RSA SL
USB 2.0
South
bridge
EIDE
Figure 1-13 Block diagram of IBM X3 x3850/x366 and x3950/x460
IBM eX4 technology builds and improves upon its previous generation X3
technology. The key enhancements are:
Processor interface
– Quad 1066 MHz front-side bus (FSB), which has a total bandwidth of up to
34.1 GBps. In X3, the maximum bandwidth was 10.66 GBps.
– The front-side bus is increased to 1066 MHz from 667 MHz for 3.2x
bandwidth improvement.
– Snoop filter is for quad FSB coherency tracking compared to X3 with only
dual FSB coherency tracking.
Memory
– Increased (four-fold) memory capacity (2X from chipset, 2X from DRAM
technology) compared to X3.
32
Planning, Installing, and Managing the IBM System x3950 M2
CPU 1
Each:
DDR2
SMI2
667 MHz
5.33 GBps
SMI2
DDR2
DDR2
SMI2
DDR2
SMI2
PCI-X bridge
33
66
266
266 MHz
ServeRAID
Adaptec
SAS
Gigabit
K/M
Ethernet
Serial
CPU 2
CPU 3
CPU 4
667 MHz
667 MHz
5.33 GBps
5.33 GBps
Memory
controller
("Hurricane")
6 GBps
6 GBps
6 GBps
1
2
3
HDD
backplane
Six PCI-X 2.0 slots:
64-bit 266 MHz
IBM XA-64e
core chipset
Scalability ports
Each: 6.4 GBps
(x460 and
MXE-460 only)
PCI-X bridge
266 MHz
4
5
6

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