Channel-Independent Mode; Memory Ras - Intel S5500WB12V Specification

Intel® Server Board S5500WB TPS
3.4.8

Channel-Independent Mode

In the Independent Channel mode, you can populate multiple channels in any order (for
example, you can populate channels B and C while channel A is empty). Also, DIMMs on
adjacent channels do not need to have identical parameters. Therefore, all DIMMs are enabled
and used in the Independent Channel mode.
Adjacent slots on channels A and D do not need matching size and organization. However, the
speed of the channel is configured to the maximum common speed of the DIMMs.
The single channel mode is established using the independent channel mode by populating
DIMM slots from channel A only.
3.4.9

Memory RAS

The memory RAS offered by the Intel
channel level (for example, during mirroring, channel B mirrors channel A). All DIMM matching
requirements are on a slot-to-slot basis on adjacent channels. For example, to enable mirroring,
corresponding slots on channels A and B must have DIMMS of identical parameters.
If one socket fails, the population requirements for RAS, the BIOS sets all six channels to the
Independent Channel mode. One exception to this rule is when all DIMM slots from a socket
are empty (for example, when only DIMM slots A1, B1, and C1 are populated, mirroring is
possible on the platform).
3.4.9.1 Memory Population for Channel Mirroring Mode
The mirrored configuration is a redundant image of the memory, and can continue to operate
despite the presence of sporadic uncorrectable errors.
Channel mirroring is a RAS feature in which two identical images of memory data are
maintained, thus providing maximum redundancy. On the Intel
boards, mirroring is achieved across channels. Active channels hold the primary image and the
other channels hold the secondary image of the system memory. The integrated memory
controller in the processor alternates between both channels for read transactions. Under
normal circumstances, write transactions are issued to both channels.
Mirroring is only supported between Channels A & B and Channels D & E. The presence of a
DIMM on Channel C or F causes the BIOS to disable Mirroring and revert to the Independent
Channel mode.
Revision 1.9
®
5500 series and 5600 series processors is performed at
Intel order number E53971-008
Functional Architecture
®
5500 series based Intel server
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