Intel CORE 2 DUO E7000 - SPECIFICATION UPDATE 7-2010 Specification page 36

instruction execution, unexpected exceptions or system hang. Intel has not
observed this erratum with any commercially available software.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
For the steppings affected, see the Summary Tables of Changes.
Status:
AW50. Benign Exception after a Double Fault May Not Cause a Triple Fault
Shutdown
According to the Intel® 64 and IA-32 Architectures Software Developer's
Problem:
Manual, Volume 3A, "Exception and Interrupt Reference", if another exception
occurs while attempting to call the double-fault handler, the processor enters
shutdown mode. However due to this erratum, only Contributory Exceptions
and Page Faults will cause a triple fault shutdown, whereas a benign
exception may not.
Implication: If a benign exception occurs while attempting to call the double-fault
handler, the processor may hang or may handle the benign exception. Intel
has not observed this erratum with any commercially available software.
Workaround: None identified.
For the steppings affected, see the Summary Tables of Changes.
Status:
AW51. Short Nested Loops That Span Multiple 16-Byte Boundaries May Cause
a Machine Check Exception or a System Hang
Under a rare set of timing conditions and address alignment of instructions in
Problem:
a short nested loop sequence, software that contains multiple conditional
jump instructions and spans multiple 16-byte boundaries, may cause a
machine check exception or a system hang.
Implication: Due to this erratum, a machine check exception or a system hang may occur.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
For the steppings affected, see the Summary Tables of Changes.
Status:
AW52. An Enabled Debug Breakpoint or Single Step Trap May Be Taken after
MOV SS/POP SS Instruction if it is Followed by an Instruction That
Signals a Floating Point Exception
A MOV SS/POP SS instruction should inhibit all interrupts including debug
Problem:
breakpoints until after execution of the following instruction. This is intended
to allow the sequential execution of MOV SS/POP SS and MOV [r/e]SP,
[r/e]BP instructions without having an invalid stack during interrupt handling.
However, an enabled debug breakpoint or single step trap may be taken after
MOV SS/POP SS if this instruction is followed by an instruction that signals a
floating point exception rather than a MOV [r/e]SP, [r/e]BP instruction. This
results in a debug exception being signaled on an unexpected instruction
boundary since the MOV SS/POP SS and the following instruction should be
executed atomically.
36
Errata
® ™
Intel Core 2 Duo Processor
Specification Update