Functional Description; Overview; Figure 4 Adm-Pcie-8K5 Block Diagram - Alpha Data ADM-PCIE-8K5 User Manual

ADM-PCIE-8K5 User Manual

3 Functional Description

3.1 Overview

The ADM-PCIE-8K5 is a versatile reconfigurable computing platform with a Kintex UltraScale KU115-2E FPGA,
Gen3x8 PCIe interface, two banks of DDR4 both 72 bits wide (for 64 bits with 8 bits ECC), two SFP+ cages
capable of up to 16.375Gbps each and any Xilinx supported standard (Ethernet, SRIO, Infiniband, SDI, etc.), two
Samtec FireFly connectors also capable of 16.375G/channel (8 channels), a U.FL input for a timing
synchronization input, a 12 pin header for general purpose use (clocking, control pins, debug, etc.) and low
speed serial communications, and a robust system monitor.
USB
SFP+ Cage
(16.375 Gbps)
SFP+ Cage
(16.375 Gbps)
Functional Description
ad-ug-1319_v1_12.pdf
Auxiliary IO
BPI
(timing, etc)
Config
System
Monitor
HRIO HRIO
JTAG
0
XCKU115-2
FLVA1517E
MGT
MGT
(0,4)
x8 PCIe Gen3 Edge
Figure 4 : ADM-PCIE-8K5 Block Diagram
FireFly FireFly
(4x16Gbps) (4x16Gbps)
MGT MGT
x72
HPIO
DDR4-2400/1866, 8/16GB+ECC
x72
HPIO
DDR4-2400/1866, 8/16GB+ECC
MGT
MAC ID
EEPROM
(5,7)
DDR4 Bank 0
DDR4 Bank 1
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