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ADM-PCIE-8K5 User Manual
3.5 SFP+
Two SFP+ cages are available at the front panel. Both cages are capable of housing either active optical or
passive copper SFP compatible components. The communication interface can run at up to 16.375Gbps per
channel. These cages are ideally suited for 10 Gigabit Ethernet or any other protocol supported by the Xilinx
GTH Transceivers. Please see Xilinx User Guide UG576 for more details on the capabilities of the transceivers.
Both SFP+ cages have control signals connected to the FPGA. Their connectivity is detailed in the
Complete
Pinout Table
at the end of this document. The notation used in the pin assignments is SFP0 and SFP1 with
locations clarified in the diagram below.
Figure 8 : SFP Locations
Page 12
Functional Description
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