Appendix A: Complete Pinout Table; Table 15 Complete Pinout Table - Alpha Data ADM-PCIE-8K5 User Manual

ADM-PCIE-8K5 User Manual

Appendix A: Complete Pinout Table

Complete Pinout Table
ad-ug-1319_v1_12.pdf
Pin
Signal Name
Number
U9 1V8_DIG
AT18 AVR_B2U
AU16 AVR_HS_B2U
AU17 AVR_HS_CLK
AV19 AVR_HS_U2B
AW18 AVR_MON_CLK
AT17 AVR_U2B
AC11
D14 DDR4_0_A0
F15 DDR4_0_A1
C14 DDR4_0_A10
E12 DDR4_0_A11
B14 DDR4_0_A12
J15 DDR4_0_A13
H12 DDR4_0_A14
B16 DDR4_0_A15
A15 DDR4_0_A16
L13 DDR4_0_A17
G12 DDR4_0_A2
E13 DDR4_0_A3
A13 DDR4_0_A4
C12 DDR4_0_A5
B12 DDR4_0_A6
F12 DDR4_0_A7
D13 DDR4_0_A8
C13 DDR4_0_A9
F13 DDR4_0_ACT_N
A12 DDR4_0_ALERT_N
B15 DDR4_0_BA0
F14 DDR4_0_BA1
G14 DDR4_0_BG0
H14 DDR4_0_BG1
L12 DDR4_0_C0
Table 15 : Complete Pinout Table (continued on next page)
CCLK
Bank Voltage
INPUT
3.3
3.3
3.3
3.3
3.3
3.3
1.8
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
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