Sma Timing Input; Usb Front Panel Interface; Figure 12 Timing Input Schematic - Alpha Data ADM-PCIE-8K5 User Manual

ADM-PCIE-8K5 User Manual

3.8 SMA Timing Input

All cards are fitted with a U.FL connector that can be utilized as a timing input. This connector can be accessed
with a U.FL cable internal to the chassis, or cabled to an SMA or similar connector at the frton panel. Contact
sales@alpha-data.com for front panel connector options.
Input is on FPGA pin AL30, IOSTANDARD LVCMOS18
The signal is isolated through a optical isolator part number ACPL-M61L with a 739 ohm of series resistance.

3.9 USB Front Panel Interface

For convenience the FPGA can be configured directly from the USB connection on the front panel. The
ADM-PCIE-8K5 utilizes the Digilent USB-JTAG converter box which is supported by the Xilinx software tool suite.
Simply connect a micro-USB AB type cable between the ADM-PCIE-8K5 USB port and a host computer with
Vivado installed. Vivado Hardware Manager will automatically recognize the FPGA and allow you to configure the
FPGA and the BPI configuration PROM.
The same USB connector is used to directly access the system monitor system. All voltages, currents,
temperatures, and non-volatile clock configuration settings can be accessed using Alpha Data's avr2util software
at this interface.
Avr2util is downloadable here:
https://support.alpha-data.com/pub/firmware/utilities/windows
https://support.alpha-data.com/pub/firmware/utilities/linux
Use "avr2util.exe /?" to see all options.
For example "avr2util.exe /usbcom com4 display-sensors" will desiplay all sensor values.
For example "avr2util.exe /usbcom com4 setclknv 0 100000000" will set the GTH_CLK_0 100MHz.
Index 0: GTH_CLK_0
Index 1: GTH_CLK_1
Index 2: MEM_CLK
Index 3: GTH_CLK_2
Change 'com4' to match the com port number assigned under windows device manager.
Functional Description
ad-ug-1319_v1_12.pdf
Figure 12 : Timing Input Schematic
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