Related Manuals for Alpha Data ADM-XRC-5T2-ADV
Summary of Contents for Alpha Data ADM-XRC-5T2-ADV
- Page 1 ADM-XRC-5T2-ADV PCI Mezzanine Card • JPEG2000 Video Compression • Multi-Gigabit Serial I/O User Guide Version 1.0...
- Page 2 ADM-XRC-5T2-ADV User Manual Copyright © 2008 Alpha Data Parallel Systems Ltd. All rights reserved. This publication is protected by Copyright Law, with all rights reserved. No part of this publication may be reproduced, in any shape or form, without prior...
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Page 3: Table Of Contents
Motherboard requirements..................2 2.2. Handling instructions....................2 2.3. Installing the ADM-XRC-5T2-ADV onto a PMC motherboard ........2 2.4. Installing the ADM-XRC-5T2-ADV if fitted to an ADC-PMC ........2 2.5. Installing the ADM-XRC-5T2-ADV if fitted to an ADC-EMC ........2 Software Installation ......................2 Board Description ......................3 4.1. - Page 4 Table 10 Pn4 I/O Voltage Selection ..................13 Table 11 XMC P15 Connections .................... 14 Table of Figures Figure 1 ADM-XRC-5T2-ADV Block Diagram................3 Figure 2 Local Bus Interface ....................4 Figure 3 JTAG Header ......................6 Figure 4 Clock Structure......................7 ADM-XRC-5T2-ADV User Manual Version 1.0...
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Page 5: Introduction
ADM-XRC-5T2-ADV User Manual Introduction The ADM-XRC-5T2-ADV is a high performance PCI Mezzanine Card (PMC) designed for supporting development of applications using the Virtex-5 FF1738 Family of FPGA Devices. • Virtex5 LXT: LX110T, LX155T, LX220T or LX330T • Virtex 5 SXT: SX240T •... -
Page 6: Hardware Installation
This chapter explains how to install the ADM-XRC-5T2-ADV onto a PMC motherboard. 2.1. Motherboard requirements The ADM-XRC-5T2-ADV is a 3.3V only PCI device and is not compatible with systems that use 5V PCI signalling levels. The board must be installed in a PMC motherboard that supplies +5.0V and +3.3V power to the PMC connectors. -
Page 7: Board Description
ADM-XRC-5T2-ADV User Manual Board Description The ADM-XRC-5T2-ADV follows the architecture of the ADM-XRC series and decouples the “target” FPGA from the PCI interface, allowing user applications to be designed with minimum effort and without the complexity of PCI design. A separate Bridge / Control FPGA interfaces to the PCI bus and provides a simple Local Bus interface to the target FPGA. -
Page 8: Local Bus
4.1. Local Bus The ADM-XRC-5T2-ADV implements a multi-master local bus between the bridge and the target FPGA using a 32- or 64-bit multiplexed address and data path. The bridge design is asynchronous and allows the local bus to be run faster or slower than the PCI bus clock to suit the requirements of the user design. -
Page 9: Flash Memory
4.3. Health Monitoring The ADM-XRC-5T2-ADV has the ability to monitor temperature and voltage of key parts of the board to maintain a check on the operation of the board. The monitoring is implemented by a National Semiconductor LM87 and is supported by the board control logic connected... -
Page 10: Jtag
ADM-XRC-5T2-ADV User Manual The ‘sysmon’ application is provided upon request that permits the reading of the health monitor. The typical output of the monitor is shown below, provided by the SYSMON program. *** SysMon *** FPGA Space Base Adr = 00900000 Control Space Base Adr = 00d00000 +1V0 Reading = 1.01 V... -
Page 11: Clocks
ADM-XRC-5T2-ADV User Manual 4.5. Clocks The ADM-XRC-5T2-ADV is provided with numerous clock sources, as shown in Figure 4 below: RefClk PCI-X Zero-delay Buffer Bridge Config (PLL) (Coolrunner) Bridge FPGA (V4LX25) XTAL_CLK REFCLK_200M 25.0 MHz 200 MHz XTAL Osc. Femto-clock LCLK Local Bus 26.5625 MHz... -
Page 12: Refclk
MGTs. 4.5.5. FCN MGT Clock A 156.25MHz precision oscillator is fitted on the ADM-XRC-5T2-ADV for Gigabit Serial I/O applications. There are also 3 other options for clock inputs to the MGT tiles of the FPGA. The oscillator frequency can be customised to suit applications requiring specific baud rates. -
Page 13: User Fpga
This permits an ideal configuration speed of up to 40MB/s. The ADM-XRC-5T2-ADV can be configured to boot the User FPGA from flash on power-up if a valid bit-stream is detected in the flash. Booting from flash will also configure the programmable clocks. -
Page 14: I/O Bank Voltages
Table 4 User FPGA I/O Bank Voltages 4.6.3. Memory Interfaces The ADM-XRC-5T2-ADV has four independent banks of DDRII SDRAM when fitted with a LX330T, SX240T or FX200T target FPGA. (Two banks with all smaller FPGAs) Each bank consists of two memory devices in parallel to provide a 32 bit datapath. 1Gb Micron MT47H64M16 devices are fitted as standard to provide 256MB per bank. -
Page 15: Fcn Interface - Mgt Links
These modules (e.g. EMCORE QTR3432) convert the electrical signals to optical format. Inter-module connection uses MJ3MM12RPR-10-0 (available from Fiberconnections Inc.) or similar Please note that these items are not normally supplied by Alpha Data. ADM-XRC-5T2-ADV User Manual Version 1.0... -
Page 16: Example Gigabit I/O Applications
ADM-XRC-5T2-ADV User Manual 4.7.2.1. Important Notes on using Optical Modules Optical modules provide a signal (‘sense_l’) indicating that they are present; however the presence of optical modules cannot be distinguished from a copper connection by relying on this signal alone. -
Page 17: Pn4 I/O
ADM-XRC-5T2-ADV User Manual 4.8. Pn4 I/O Up to 16 pairs of differential or 32 single-ended signals are available on Pn4 and are sourced from Bank 18 of the User FPGA. All of the signal traces are routed as 100 Ohm differential pairs and each pair is matched in length. -
Page 18: Adv212 Interface
JPEG 2000 (J2K)—ISO/IEC15444-1 image compression standard. The ADM-XRC-5T2-ADV features 4 ADV212 devices which can all operate independently or in 2 banks of 2 for full frame capabilities. -
Page 19: Jpeg Processor Interface Pin Locations
ADM-XRC-5T2-ADV User Manual Individual signals to each ADV212 codec ack_l - ADV212 acknowledge signal cs_l - ADV212 chip select signal dack_l<0> to <1> - ADV212 DMA acknowledge signals dreq_l<0> to <1> - ADV212 DMA request signals irq_l - ADV212 interrupt request signal... -
Page 20: Design Examples
AU41 AF41 cs_l AV41 AG42 rd_l AU39 AD41 we_l AV40 AE42 ack_l AT39 AG41 Design Examples Example UCF, HDL files and Application software are available from Alpha Data for purchasers of this card. ADM-XRC-5T2-ADV User Manual Version 1.0 Page 16... -
Page 21: Revision History
ADM-XRC-5T2-ADV User Manual 5.1. Revision History Date Revision Nature of Change 16-Dec-2008 Initial version ADM-XRC-5T2-ADV User Manual Version 1.0 Page 17...
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