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NEX ROBOTICS Fire Bird V ATMEGA2560 Software Manual page 96

Robotic research platform
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7.2 Registers for ADC
7.2.1 ADCSRA – ADC Control and Status Register A
Bit
7
ADEN
Read / Write
R/W
Initial Value
0
Bit 7 – ADEN: ADC Enable
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning off
the ADC while a conversion is in progress, will terminate this conversion.
Bit 6 – ADSC: ADC Start Conversion
In Single Conversion mode, write this bit to one to start each conversion. In Free Running mode,
write this bit to one to start the first conversion. The first conversion after ADSC has been
written after the ADC has been enabled, or if ADSC is written at the same time as the ADC is
enabled, will take 25 ADC clock cycles instead of the normal 13. This first conversion performs
initialization of the ADC. ADSC will read as one as long as a conversion is in progress. When
the conversion is complete, it returns to zero. Writing zero to this bit has no effect.
Bit 5 – ADATE: ADC Auto Trigger Enable
When this bit is written to one, Auto Triggering of the ADC is enabled. The ADC will start a
conversion on a positive edge of the selected trigger signal. The trigger source is selected by
setting the ADC Trigger Select bits, ADTS in ADCSRB.
Bit 4 – ADIF: ADC Interrupt Flag
This bit is set when an ADC conversion completes and the Data Registers are updated. The ADC
Conversion Complete Interrupt is executed if the ADIE bit and the I-bit in SREG are set. ADIF
is cleared by hardware when executing the corresponding interrupt handling vector.
Alternatively, ADIF is cleared by writing a logical one to the flag. Beware that if doing a Read-
Modify-Write on ADCSRA, a pending interrupt can be disabled. This also applies if the SBI and
CBI instructions are used.
Bit 3 – ADIE: ADC Interrupt Enable
When this bit is written to one and the I-bit in SREG is set, the ADC Conversion Complete
Interrupt is activated.
Bits 2:0 – ADPS2:0: ADC Prescaler Select Bits
These bits determine the division factor between the XTAL frequency and the input clock to the
ADC.
© NEX Robotics Pvt. Ltd. and ERTS Lab IIT Bombay, INDIA
6
5
ADSC
ADATE
ADIF
R/W
R/W
0
0
Fire Bird V ATMEGA2560 Software Manual
4
3
ADIE
ADPS2
R/W
R/W
R/W
0
0
2
1
0
ADPS1
ADPS0
R/W
R/W
0
0
0
96

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