NEX ROBOTICS Fire Bird V ATMEGA2560 Software Manual page 106

8.1.3 UCSRnC – USART Control and Status Register n C
Bit 7
UMSELn1
Read / Write R/W
Initial Value 0
Bits 7:6 – UMSELn1:0 USART Mode Select
These bits select the mode of operation of the USARTn as shown in Table 8.1.
Note: See "USART in SPI Mode" on page 232 of the ATMEGA2560 datasheet for full
description of the Master SPI Mode (MSPIM) operation
Bits 5:4 – UPMn1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmitter will
automatically generate and send the parity of the transmitted data bits within each frame. The
Receiver will generate a parity value for the incoming data and compare it to the UPMn setting.
If a mismatch is detected, the UPEn Flag in UCSRnA will be set.
Bit 3 – USBSn: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores
this setting.
Bit 2:1 – UCSZn1:0: Character Size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits
(Character Size) in a frame the Receiver and Transmitter use.
© NEX Robotics Pvt. Ltd. and ERTS Lab IIT Bombay, INDIA
6 5
UMSELn0 UPMn1
R/W R/W
0 0
UMSELn1 UMSELn0
0 0
0 1
1 0
1 1
Table 8.1: UMSELn Bit settings
UPMn1 UPMn0
0 0
0 1
1 0
1 1
Table 8.2: UPMn Bits settings
USBSn
0
1
Table 8.3: USBSbit settings
UCSZn2 UCSZn1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
Table 8.4: UCSZn Bits Settings
Fire Bird V ATMEGA2560 Software Manual
4 3
UPMn0 USBSn
R/W R/W
0 0
Mode
Asynchronous USART
Synchronous USART
(Reserved)
Master SPI (MSPIM)(1)
Parity mode
Disabled
Reserved
Enabled, Even Parity
Enabled, Odd Parity
Stop Bit(s)
1-bit
2-bit
UCSZn0 Character size
0 5-bit
1 6-bit
0 7-bit
1 8-bit
0 Reserved
1 Reserved
0 Reserved
1 9-bit
2 1
UCSZn1 UCSZn0 UCP0Ln
R/W R/W
0 0
0
R/W
0
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