NEX ROBOTICS Fire Bird V ATMEGA2560 Software Manual page 76

NEX Robotics
5.2 16 bit Timer Registers
Note:
• In all the terms 'n' represents timer number which can be 1, 3, 4 or 5 and 'X' represents
output compare channel number which can be A, B or C.
• For more detailed description refer to section 16 to section 20 of the ATMEGA2560
datasheet which is located in the "datasheet" folder in the documentation CD.
Clock source for the Timers
The Timer/Counter can be clocked by an internal or an external clock source. The clock source is
selected by the Clock Select logic which is controlled by the Clock Select CSn2:0) bits located in
the Timer/Counter control Register B (TCCRnB). Timer/Counter 0, 1, 3, 4, and 5 share the same
prescaler module, but the Timer/Counters can have different prescaler settings. The description
below applies to all Timer/Counters. Tn is used as a general name, n = 1, 3, 4 or 5.
The Timer/Counter can be clocked directly by the system clock (by setting the CSn2:0 = 1). This
provides the fastest operation, with a maximum Timer/Counter clock frequency equal to system
clock frequency (fCLK_I/O). Alternatively, one of four taps from the prescaler can be used as a
clock source. The prescaled clock has a frequency of either fCLK_I/O/8, fCLK_I/O/64,
fCLK_I/O/256, or fCLK_I/O/1024.
5.2.1 TCCRnA – Timer/Counter Control Register A
Bit 7
COMnA1
Read / Write R/W
Initial Value 0
Bit 7:6 – COMnA1:0: Compare Output Mode for Channel A
Bit 5:4 – COMnB1:0: Compare Output Mode for Channel B
Bit 3:2 – COMnC1:0: Compare Output Mode for Channel C
The COMnA1:0, COMnB1:0, and COMnC1:0 control the output compare pins (OCnA, OCnB,
and OCnC respectively) behavior. If one or both of the COMnA1:0 bits are written to one, the
OCnA output overrides the normal port functionality of the I/O pin it is connected to. If one or
both of the COMnB1:0 bits are written to one, the OCnB output overrides the normal port
functionality of the I/O pin it is connected to. If one or both of the COMnC1:0 bits are written to
one, the OCnC output overrides the normal port functionality of the I/O pin it is connected to.
However, note that the Data Direction Register (DDR) bit corresponding to the OCnA, OCnB or
OCnC pin must be set in order to enable the output driver. When the OCnA, OCnB or OCnC is
connected to the pin, the function of the COMnX1:0 bits is dependent of the WGMn3:0 bits
setting. Table 5.1 shows the COMnA1:0, COMnB1:0 and COMnC1:0 bit functionality when the
WGMn3:0 bits are set to the fast PWM mode.
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6 5
COMnA0 COMnB1 COMnB0
R/W R/W
0 0
Fire Bird V Software Manual
4 3
COMnC1 COMnC0
R/W R/W R/W
0 0
2 1 0
WGMn1 WGMn0
R/W R/W
0 0 0
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