NEX Robotics
COMnA1
COMnA0
COMnB1
COMnB0
COMnC1
COMnC0
0
0
1
1
Table 5.1: COMnX1:0 bit functionality when the WGMn3:0 bits are set to fast PWM
Bit 1:0 – WGM51:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the
counting sequence of the counter, the source for maximum (TOP) counter value, and what type
of waveform generation to be used, see Table 5.3. Modes of operation supported by the
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode,
and three types of Pulse Width Modulation (PWM) modes. For more information on the different
modes, refer "Modes of Operation" on page 148 of the ATMEGA2560 datasheet.
5.2.2 TCCRnB – Timer/Counter Control Register B
Bit
7
ICNCn
Read / Write
R/W
Initial Value
0
Bit 7 – ICNC5: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the Noise Canceler is
activated, the input from the Input Capture Pin (ICPn) is filtered. The filter function requires four
successive equal valued samples of the ICPn pin for changing its output. The input capture is
therefore delayed by four Oscillator cycles when the noise canceler is enabled.
Bit 6 – ICESn: Input Capture Edge Select
This bit selects which edge on the Input Capture Pin (ICP5) that is used to trigger a capture
event. When the ICES5 bit is written to zero, a falling (negative) edge is used as trigger, and
when the ICESn bit is written to one, a rising (positive) edge will trigger the capture. When a
capture is triggered according to the ICESn setting, the counter value is copied into the Input
Capture Register (ICRn). The event will also set the Input Capture Flag (ICFn), and this can be
used to cause an Input Capture Interrupt, if this interrupt is enabled. When the ICRn is used as
TOP value (see description of the WGMn3:0 bits located in the TCCRnA and the TCCRnB
Register), the ICPn is disconnected and consequently the input capture function is disabled.
www.nex-robotics.com
0
Normal port operation, OC5A, OCnB, OCnC disconnected
1
WGMn3:0 = 14 or 15: Toggle OCnA on Compare Match, OCnB and OCnC
disconnected (normal port operation). For all other WGMn settings, normal
port operation, OCnA/OCnB/OCnC disconnected.
0
Clear OCnA/OCnB/OCnC on compare match, set OCnA/OCnB/OCnC at
BOTTOM (non-inverting mode).
1
Set OCnA/OCnB/OCnC on compare match, clear OCnA/OCnB/OCnC at
BOTTOM (inverting mode).
6
5
ICESn
-
R/W
R
0
0
Fire Bird V Software Manual
Description
mode.
4
3
WGMn3
WGMn2
R/W
R/W
0
0
2
1
CSn2
CSn1
CSn0
R/W
R/W
R/W
0
0
0
0
77
Need help?
Do you have a question about the Fire Bird V ATMEGA2560 and is the answer not in the manual?