NEX Robotics
5.1 Important terms involved in the timers:
BOTTOM: The counter reaches the BOTTOM when it becomes 0x0000.
MAX: The counter reaches its MAX value when it becomes 0xFF (decimal 255) for 8 bit timer
or 0xFFFF (decimal 65535) for 16 bit timer.
TOP: The counter reaches the TOP when it becomes equal to the highest value in the count
sequence. The TOP value can be assigned to be one of the fixed values: 0x00FF, 0x01FF, or
0x03FF, or to the value stored in the OCRnA or ICRn Register. The assignment is dependent on
the mode of operation.
Accessing 16-bit Registers
The TCNTn, OCRnA/B/C, and ICRn are 16-bit registers that can be accessed by the AVR CPU
via the 8-bit data bus. The 16-bit register must be byte accessed using two read or write
operations. Each 16-bit timer has a single 8-bit register for temporary storing of the high byte of
the 16-bit access. The same Temporary Register is shared between all 16-bit registers within
each 16-bit timer. Accessing the low byte triggers the 16-bit read or write operation. When the
low byte of a 16-bit register is written by the CPU, the high byte stored in the Temporary
Register, and the low byte written are both copied into the 16-bit register in the same clock cycle.
When the low byte of a 16-bit register is read by the CPU, the high byte of the 16-bit register is
copied into the Temporary Register in the same clock cycle as the low byte is read.
Not all 16-bit accesses uses the Temporary Register for the high byte. Reading the OCRnA/B/C
16-bit registers does not involve using the Temporary Register. To do a 16-bit write, the high
byte must be written before the low byte. For a 16-bit read, the low byte must be read before the
high byte.
Modes of operation in timers:
1. Normal mode
2. Clear timer on compare match (CTC) mode
3. Fast PWM mode
4. Phase correct PWM mode
5. Phase and frequency correct PWM mode
For more information on the timer operation refer to ATMEGA2560 datasheet.
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