Timer and Counter Instructions
Timer input
ON
CIO 000000
OFF
#0100
Timer PV
#
T0001
Timer Completion
Flag
ON
T0001
OFF
ON
Reset input
OFF
CIO 000001
3-6-7
LONG TIMER: TIML(542)/TIMLX(553)
Purpose
Ladder Symbol
Variations
266
If the timer input is turned OFF before the SV is reached, the timer will stop
timing but the PV will be maintained. The timer will resume from its previous
PV when the timer input is turned ON again.
TTIM
000000
0001
#0100
000001
0
TIML(542)/TIMLX(553) operates a decrementing timer with units of 0.1 s that
can time up to 115 days for TIML(542) and 4,971 days for TIMLX(543). The
timer accuracy is 0 to 0.01 s.
Note The timer accuracy for CS1D CPU Units is 10 ms + the cycle time
BCD
TIML(542)
D1
D2
S
Binary
TIMLX(543)
D1
D2
S
Variations
Immediate Refreshing Specification
000000
or
000001
ON
OFF
#0100
#
0
ON
OFF
ON
OFF
D1: Completion Flag
D2: PV word
S: SV word
D1: Completion Flag
D2: PV word
S: SV word
Executed Each Cycle for ON Condition
Executed Once for Upward Differentiation
Executed Once for Downward Differentiation Not supported.
Section 3-6
TTIMX
0001
&0100
Timing resumes.
PV maintained.
TIML(542)/
TIMLX(553)
Not supported.
Not supported.
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