And Load: And Ld - Omron SYSMAC CJ - REFERENCE MANUAL 08-2008 Reference Manual

Programmable controllers
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Sequence Input Instructions
Description
Flags
Precautions
Example
3-3-7

AND LOAD: AND LD

Purpose
Ladder Symbol
Variations
Applicable Program Areas
172
Area
Index Registers
Indirect addressing using
Index Registers
OR NOT is used for a normally closed bit connected in parallel. A normally
closed bit is configured to form a logical OR with a logic block beginning with a
LOAD or LOAD NOT instruction (connected to the bus bar or at the beginning
of the logic block). If there is no immediate refreshing specification, the speci-
fied bit in I/O memory is read. If there is an immediate refreshing specification,
the status of the Basic Input Unit's input terminal is read.
There are no flags affected by this instruction.
Immediate refresh (!) can be specified for OR NOT. An immediate refresh
instruction updates the status of the input bit just before the instruction is exe-
cuted from a Basic Input Unit (but not Basic Input Units on Slave Racks or for
C200H Group 2 Multi-point Input Units).
Instruction
LD
AND
AND
OR
AND
LD
AND
OR NOT
AND LD
OUT
Takes a logical AND between logic blocks.
Logic block
Variations
Creates ON Each Cycle AND Result is ON
Immediate Refreshing Specification
Block program areas
OK
OR NOT bit operand
---
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Operand
000000
000001
000002
000003
000004
000005
000006
000007
---
000008
Logic block
Step program areas
OK
OK
Section 3-3
AND LD
Not supported.
Subroutines
Interrupt tasks
OK

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