Omron SYSMAC CJ - REFERENCE MANUAL 01-2008 Reference Manual page 1324

CS-series Instruction Execution Times and Number of Steps
4-1-2 Sequence Output Instructions
Instruction Mnemonic
OUTPUT OUT
!OUT
OUTPUT NOT OUT NOT
!OUT NOT
KEEP KEEP
DIFFERENTI- DIFU
ATE UP
DIFFERENTI- DIFD
ATE DOWN
SET SET
!SET
RESET RSET
!RSET
MULTIPLE SETA
BIT SET
MULTIPLE RSTA
BIT RESET
SINGLE BIT SETB
SET
!SETB
SINGLE BIT RSTB
RESET
!RSTB
SINGLE BIT OUTB
OUTPUT
!OUTB
Code Length
(steps)
CPU-6@H
(See note.)
--- 1 0.02
--- 2 +21.37
+49.3
--- 1 0.02
--- 2 +21.37
+49.3
011 1 0.06
013 2 0.24
014 2 0.24
--- 1 0.02
--- 2 +21.37
+49.3
--- 1 0.02
--- 2 +21.37
+49.3
530 4 5.8
25.7
531 4 5.7
25.8
532 2 0.24
3 +21.44
534 2 0.24
3 +21.44
534 2 0.22
3 +21.42
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
ON execution time ( s)
CPU-4@H CPU-6@
0.04 0.17 0.21
+21.37 +21.37 +21.37
+49.3 +49.3 +49.3
0.04 0.17 0.21
+21.37 +21.37 +21.37
+49.3 +49.3 +49.3
0.08 0.25 0.29
0.40 0.46 0.54
0.40 0.46 0.54
0.06 0.17 0.21
+21.37 +21.37 +21.37
+49.3 +49.3 +49.3
0.06 0.17
+21.37 +21.37 +21.37
+49.3 +49.3 +49.3
6.1 7.8 7.8
27.2 38.8 38.8
6.1 7.8 7.8
27.1 38.8 38.8
0.34 --- ---
+21.54 --- ---
0.34 --- ---
+21.54 --- ---
0.32 --- ---
+21.52 --- ---
Section 4-1
Conditions
CPU-4@
---
Increase for CS
Series
Increase for
C200H
---
Increase for CS
Series
Increase for
C200H
---
---
---
---
Increase for CS
Series
Increase for
C200H
0.21 Word specified
Increase for CS
Series
Increase for
C200H
With 1-bit set
With 1,000-bit
set
With 1-bit reset
With 1,000-bit
reset
---
---
---
---
---
---
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