General Synchronization; Trigger - Matrox Corona Installation And Hardware Reference

54 Chapter 6: Matrox Corona hardware reference
Slave mode
Master mode
Direct TTL trigger
The digital interface supports grabbing from up to three (8-bit)
synchronized channels simultaneously, with each channel
having its own destination address and pixel mask. The
interface can accept continuous or single-frame/field data in
progressive/interlaced input modes. The interface can operate
at up to 30 MSPS.
The companion digital-input board translates 24-bit digital
data (as well as control signals such as syncs, clocks, exposure,
and trigger) from standard RS-422 or EIA-644 (LVDS) format
to TTL logic levels.

General synchronization

Matrox Corona can operate in either slave or master mode.
In slave mode, the video source provides the synchronization
information to Matrox Corona. It can accept one of the
following synchronization schemes:
The video source encodes the synchronization signals on
the analog video signal provided to the board.
The video source supplies the horizontal and/or vertical
synchronization signals separately in TTL format.
The video source provides a composite synchronization
signal in TTL format, separate from the analog video.
In master mode, Matrox Corona generates (using the PSG
FPGA) the horizontal and/or vertical synchronization signals
and supplies them to the video source. This allows the video
source to synchronize to the board.

Trigger

Matrox Corona accepts an external trigger input which allows
image acquisition to be synchronized to external events
(MIL-Lite MdigControl()). The trigger mode can be
synchronous or asynchronous.
Trigger signals can be received directly (pin 20 on the
video-input connector) in TTL format. The amplitude of the
TTL level signal must not exceed 5 V. A signal over 2 V is