ZiLOG Z80-CPU Technical Manual page 47

Instruction
CZ
f\
S NH
Comments
ADD A, s; ADC A,s
t
t V t
o
t
8-bit add or add with carry
SUB s; SBC A, s, CP s, NEG
t t V
t t
8-bit subtract, subtract with carry, compare and
negate accumulator
ANDs
0 t P
t
0
} Logical operations
ORs; XORs
0 t P
t
0 0
And set's different flags
INC s
e t V
t
0
f
8-bit increment
DECm
e t V t
t
8-bit decrement
ADDDD,ss
t
e e e
o
X 16-bit add
ADC HL,ss
t
t V t
o
X
16-bit add with carry
SBC HL,ss t
t V t I X
16-bit subtract with carry
RLA;RLCA,RRA,RRCA
t e e e 0 0
Rotate accumulator
RL m; RLC m; RR m; RRC m
t
t P t 0 0
Rotate and shift location m
SLA m; SRA m; SRL m .
RLD,RRD
e
t
P t 0 0 Rotate digit left and right
DAA
t
t P t e
t
Decimal adjust accumulator
CPL
e • e e
I
Complement accumulator
SCF
I e e e 0 0
Set carry
CCF
t • e • 0 X
Complement carry
IN r, (C) e t P t 0 0 Input register indirect
INI; IND; OUTI; OUTD e t X X I X } Block input and output
INIR; INDR; OTIR; OTDR
e I X X I X
Z = 0 ifB
*'
0 otherwise Z = I
LDI,LDD
eX t X 0 0 } Block transfer instructions
LDIR,LDDR
eX
o
X 0 0 P/V = 1 ifBC
*'
0, otherwise P/V = 0
CPI, CPIR, CPD, CPDR • t
t ~
I X Block search instructions
Z = I if A = (HL), otherwise Z = 0
P/V = I if BC
*'
0, otherwise P/V = 0
LDA, I; LD A, R
e t FFt 0 0
The content of the interrupt enable flip-flop (IFF)
is copied into the P/V flag
BITb, s
e t
xix
0 I
The state of bit b oflocation s is copied into the Z flag
NEG
~ ~ V ~ I ~
Negate accumulator
The following notation is used in this table:
Symbol Op~tion
C Carry/link flag. C=1 if the operation produced a carry from the MSB of the operand or result.
Z Zero flag. Z= 1 if the result of the operation is zero.
S Sign flag. S=1 if the MSB of the result is one.
PlY Parity or overflow flag. Parity (P) and overflow
(V)
share the same)lllg. Logical operations affect this flag
with the parity of the result while arithmetic operations affect this flag with the overflow of the result. If PlY
holds parity, P/V=1 if the result of the operation is even, P/V=O if result is odd. If PlY holds overflow, P/V=l
if the result of the operation produced an overflow.
H
Half-carry flag. H=1 if the add or subtract operation produced a carry into or borrow from into bit 4 of the accumulator.
N Add/Subtract flag. N=l if the previous operation was a subtract
Hand N flags are used in conjunction with the decimal adjust instruction (DAA) to properly correct the re-
sult into packed
nco
format following addition or
sub~tion
using operands with packed BCD format.
t The flag is affected according to the result of the operation.
• The flag is unchanged by the operation.
o
The flag is reset by the operation.
1 The flag is set by the operation.
X The flag is a "don't care_"
V PlY flag affected according to the overflow result of the operation.
P PlY flag affected according to the parity result of the operation.
Anyone of the CPU registers A, B, C, D, E, H, L.
s Any 8-bit location for all the addressing modes allowed for the particular instruction .•
S5
Any 16-bit location for all the addressing modes allowed for that instruction.
ii Anyone of the two index registers IX or IY ..
R Refresh counter.
n 8-bit value in range
<0.
255>
nn 16-bit value in range
<0.
65535>
m Any 8-bit location for all the addressing modes allowed for the particular instruction.
SUMMARY OF FLAG OPERATION
TABLE
6.0-1
41