Lpc Debug - ADLINK Technology Express-BASE User Manual

6.7 LPC Debug

CN32: LPC Debug header
CNY1: LPC Test Connector
(compatible with ADLINK
LPC Debug Card)
External LPC EEPROM Address Selection
JP3 & JP4 configure the address of the external EEPROM connected to the LPC Debug header (CN32)
JP3: EEPROM Address A0 Selection
JP4: EEPROM Address A1 Selection
Express-BASE User's Manual
Pin Signal
1 LPC_CLK
1 2
3 LPC_FRAME#
5 LPC_RST#
7 LPC_AD3
9 + 3.3V
11 LPC_AD0
13 SMB_CK
15 SPD_A1 (See JP3) 16
19 20
17 GND
19 KBRST#
Pin Signal
1 LPC_DRQ0#
3 LPC_DRQ1#
5 LPC_SERIRQ
7 LPC_FRAME#
9 LPC_RST#
11 LPC_CLK
1
2
3
1
2
3
NOTE:
Pin Signal
2 GND
4 KEY
6 + 5V
8 LPC_AD2
10 L_AD1
12 GND
14 SMB_DAT
SPD_A0 (See JP4)
18 LPC_SERIRQ
20 A20GATE#
Pin Signal
2 LPC_AD0
4 LPC_AD1
6 LPC_AD2
8 LPC_AD3
10 GND
12 GND
Jumper Status
1-2 High "1"
2-3 Low "0"
Jumper Status
1-2 High "1"
2-3 Low "0"
<<<< indicates default setting
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