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Test Pods 3 and 4 in 300 Mb/s Mode
1 Perform the normal and complement tests for each additional pod on the
logic analyzer, changing the connection to the pod, channel assignments,
thresholds, etc. as appropriate. Test using the L clock for Pod 3 and the M
clock for Pod 4. Upon completion, the logic analyzer is completely tested
in the 300 Mb/s mode.
Test Pod 1 in 600 Mb/s Mode
The J clock will be used for testing all pods in the 600 Mb/s mode.
Therefore two E5382A Flying Lead Probe sets will be required when
testing pods 2, 3, and 4.
1 Disconnect the E5382A Flying Lead Probe from Pod 4 of the logic analyzer
and connect it to Pod 1 of the logic analyzer.
2 On the 8133A pulse generator, in the PULSE setup for CHANNEL 2, press
the COMP button to return the outputs to normal.
3 Note that the signal on the oscilloscope has moved. Change the
oscilloscope's horizontal position to 525 ps (or as required) to center the
measured pulse on the oscilloscope display.
4 Set the frequency of the pulse generator. The logic analyzer will be tested
using a double-edge clock. The test frequency is half the test clock rate
because data is acquired on both the rising edge and the falling edge of the
clock. Set the frequency to 300 MHz plus the frequency uncertainty of the
pulse generator, plus a test margin of 1%.
For example, if you are using an 8133A pulse generator, the frequency
accuracy is ±1% of setting. Use a test margin of 1%. Set the frequency to
300 MHz plus 2% (306 MHz).
5 Verify the DC offset and adjust it if necessary. See page 32.
6 Verify the oscilloscope Deskew and adjust if necessary. See page 33.
7 Adjust the measured pulse width from the pulse generator to 1 ns (minus
the test margin) as described on page 35.
8 In the logic analyzer "Setup and Trigger..." window, select the Sampling
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Chapter 3: Testing Logic Analyzer Performance
Test Pods 3 and 4 in 300 Mb/s Mode
79
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