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Test Pod 2 in 300 Mb/s Mode
1 Disconnect the E5382A Flying Lead Probe Set from Pod 1 and connect it
to Pod 2 of the logic analyzer. Do not remove the flying leads that are
connected to CLK, CLK, and the data channels.
2 On the 8133A pulse generator, in the PULSE setup for CHANNEL 2, press
the COMP button to return the outputs to normal.
3 Note that the signal on the oscilloscope has moved. Change the
oscilloscope's horizontal position to 525 ps (or as required) to center the
measured pulse on the oscilloscope display.
4 Verify the DC offset and adjust it if necessary. See page 32.
5 Deskew the oscilloscope if necessary. See page 33.
6 Readjust the pulse width from the pulse generator as measured on the
oscilloscope. See page 35.
7 In the logic analyzer's Setup and Trigger window, Format tab, scroll to the
right and unassign all Pod 1 bits. A Warning window will appear stating
that the trigger function has become invalid. Select OK to close the
Warning window.
8 Assign bits 2, 6, 10, and 14 of Pod 2.
9 Set the Pod 2 threshold to 1 volt (just as you did for Pod 1 on page 66).
10 In the "Setup and Trigger..." window, select the Sampling tab. In the Clock
Setup area, set the J clock to "Off" and set the K clock to "Both Edges".
11 Under the Format tab, use the scroll bar at the bottom of the window to
scroll to the left and select the "Clock thresh..." button. In the Clock
Thresholds window, select the K clock threshold field, then in the K
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Chapter 3: Testing Logic Analyzer Performance
Test Pod 2 in 300 Mb/s Mode
77
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