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The IPMC provides six I2C bus connections. Two are used as the redundant IPMB bus connections to
the backplane, one is used for IPMB-L bus with AMC modules, two others I2C are used to LAN
connections for IPMI over LAN support and the last one is for local EEPROM storage.
If an IPMB bus fault or IPMC failure occurs, IPMB isolators are used to switch and isolate the
backplane/system IPMB bus from the faulted SBC board. Where possible, the IPMC will isolate the
failure line and will use the other bus to re-establish system management communication to report
the fault.
The onboard DC voltages, currents, and temperature are monitored by the IPMC microcontroller
device. The IPMC will log an event into the ShMc SEL if any of the thresholds are exceeded.
To increase the reliability of the AT8001 SBC management subsystem, an external watchdog
supervisor only for the IPMC is implemented. The IPMC must strobes the external watchdog at two-
second intervals to ensure continuity of operation of the board's management subsystem. If the
IPMC ceases to strobe the watchdog supervisor, the watchdog isolates the IPMC from the IPMBs and
resets the IPMC. The watchdog supervisor does not reset the payload power and the restart of the
IPMC will not affect the payload and will restore the previous Hot Swap state and power level
negociated with the ShMc. The watchdog timeout expires after six seconds if strobes are not
generated. The external watchdog supervisor is not configurable and must not be confused with the
IPMI v1.5 watchdog timer commands.
This external watchdog of the IPMC is implemented in a second microcontroller. This
microcontroller is responsible to monitor the IPMC and to manage IPMC fail safe firmware upgrade
process. The name of this second microcontroller is the Firmware Upgrade Manager (FWUM). The
FWUM can handle two Firmware code that are stored in two external SEPROM memories. If a failure
occurs during firmware upgrade, the FWUM will automatically rollback to the redundant IPMC
firmware image.
2.16.1
Sensor Data Record (SDR)
Every sensor on the baseboard is associated with a Sensor Data Record (SDR). Sensor Data Records
contain information about the sensors identification such as sensor type, sensor name, sensor unit.
SDR also contain the configuration of a specific sensor such as threshold/hystheresis, event
generation capabilities that specifies sensor behaviour. Some field of the sensor SDR are
configurable through IPMI v1.5 command and are set to built-in initial value. Finally one field wich
is the sensor owner must reflect the baseboard addresses that allow the ShMc to identify the owner
of the SDR when it is scaned from the satellite management controller and saved within the ShMc
SDR repository.
The AT8001 management controller is set up as a satellite management controller (SMC). It does
support sensor devices, and use the IPMI dynamic sensor population feature of IPMI v1.5 to merge
the hot swaped AMC sensor with the AT8001 sensors population. The usual way the ShMc is
informed about an AMC insertion is through the AMC carrier Hot Swap sensor, however to remain
compliant to IPMI v1.5, the IPMC update the sensor population change indicator timestamp
accessible through the Get Device SDR Info command. All SDRs can be queried using Device SDR
commands to the firmware. Baseboard sensors that have been implemented are listed below.
2-28
AT8001 User's Guide
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