Kontron AdvancedTCA AT8001 User Manual page 111

REFSEL Show the reference that is currently selected.
0: Primary reference
1: Secondary reference
RSV1/ RSV0 Reserved.
B.11 0A0AH: TELCLOCK2 (TELECOM CLOCK OPTION)
Address Action
PRI_LOS
READ
0xA0A
WRITE
Reset
PRI_LOS Loss of primary reference clock detected.
This bit is high when the primary clock at the input of the PLL (i.e. after PLD mux) is loss.
SEC_LOS Loss of secondary reference clock detected.
This bit is high when the primary clock at the input of the PLL (i.e. after PLD mux) is loss.
HOLDOVER Hold over detected by the PLL.
UNLOCK Unlock detected by the PLL.
DRVCLKA1 Drive transmission clock CLKA for AMC-B2
This bit is forced to 0 when AMC-B2 is absent or unpowered.
DRVCLKA0 Drive transmission clock CLKA for AMC-B1
This bit is forced to 0 when AMC-B2 is absent or unpowered.
D7 D6 D5
SEC_LOS HOLDOVER
NU NU NU
X X X
D4 D3 D2
UNLOCK NU DRVCLKA1
NU NU DRVCLKA1
X X 0
B-6
D1 D0
NU DRVCLKA0
NU DRVCLKA0
X 0
AT8001 User's Guide