Special Function Register (Sfr) - NEC mPD780024AS Series Preliminary User's Manual

3.2.3 Special function register (SFR)

Unlike a general-purpose register, each special function register has special functions.
It is allocated in the FF00H to FFFFH area.
The special function register can be manipulated like the general-purpose register, with the operation, transfer and
bit manipulation instructions. Manipulatable bit units, 1, 8, and 16, depend on the special function register type.
Each manipulation bit unit can be specified as follows.
• 1-bit manipulation
Describe the symbol reserved with assembler for the 1-bit manipulation instruction operand (sfr.bit).
This manipulation can also be specified with an address.
• 8-bit manipulation
Describe the symbol reserved with assembler for the 8-bit manipulation instruction operand (sfr).
This manipulation can also be specified with an address.
• 16-bit manipulation
Describe the symbol reserved with assembler for the 16-bit manipulation instruction operand (sfrp).
When addressing an address, describe an even address.
Table 3-5 gives a list of special function registers. The meaning of items in the table is as follows.
• Symbol
Symbol indicating the address of a special function register. It is a reserved word in the RA78K0, and is defined
via the header file "sfrbit.h" in the CC78K0. When using the RA78K0, ID78K0-NS, ID78K0, or SM78K0, symbols
can be written as an instruction operand.
• R/W
Indicates whether the corresponding special function register can be read or written.
R/W: Read/write enable
R: Read only
W: Write only
• Manipulatable bit units
Indicates the manipulatable bit unit (1, 8, or 16). "–" indicates a bit unit for which manipulation is not possible.
• After reset
Indicates each register status upon RESET input.
CHAPTER 3 CPU ARCHITECTURE
Preliminary User's Manual U16035EJ1V0UM
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