NEC mPD780024AS Series Preliminary User's Manual page 122

Figure 6-18. Timing of Pulse Width Measurement Operation by Free-Running Counter
and Two Capture Registers (with Rising Edge Specified)
t
Count clock
TM0 count value 0000H
TI00 pin input
CR01 capture value
CR00 capture value
INTTM01
OVF0
(4) Pulse width measurement by means of restart
When input of a valid edge to the TI00/TO0/P70 pin is detected, the count value of the 16-bit timer counter 0
(TM0) is taken into 16-bit timer capture/compare register 01 (CR01), and then the pulse width of the signal input
to the TI00/TO0/P70 pin is measured by clearing TM0 and restarting the count (see register settings in Figure
6-19).
The edge specification can be selected from two types, rising and falling edges by bits 4 and 5 (ES00 and ES01)
of the prescaler mode register 0 (PRM0).
In a valid edge detection, the sampling is performed by a cycle selected by the prescaler mode register 0 (PRM0)
and a capture operation is only performed when a valid level is detected twice, thus eliminating noise with a short
pulse width.
Caution If the valid edge of TI00/TO0/P70 pin is specified to be both rising and falling edges, the 16-
bit timer capture/compare register 00 (CR00) cannot perform the capture operation.
122
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 0
0001H D0 D0 + 1
D0
(D1 – D0) × t
Preliminary User's Manual U16035EJ1V0UM
D1 D1 + 1 FFFFH 0000H
D1
(10000H – D1 + D2) × t
D2 D2 + 1 D3
D2
D3
(D3 – D2) × t