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13.1.3
Pin Configuration
Table 13.1 shows the LCD controller/driver pin configuration.
Table 13.1 Pin Configuration
Name
Segment output pins
Common output pins
Segment external
expansion signal pins
LCD power supply pins
13.1.4
Register Configuration
Table 13.2 shows the register configuration of the LCD controller/driver.
Table 13.2 LCD Controller/Driver Registers
Name
LCD port control register
LCD control register
LCD control register 2
LCD RAM
Clock stop register 2
Abbrev.
I/O
SEG
to SEG
Output
32
1
COM
to COM
Output
4
1
CL
Output
1
CL
Output
2
M
Output
DO
Output
V
, V
, V
, V
—
0
1
2
3
Abbrev.
LPCR
LCR
LCR2
—
CKSTPR2
Function
LCD segment drive pins
All pins are multiplexed as port pins
(setting programmable)
LCD common drive pins
Pins can be used in parallel with static or
1/2 duty
Display data latch clock, multiplexed as
SEG
32
Display data shift clock, multiplexed as
SEG
31
LCD alternation signal, multiplexed as
SEG
29
Serial display data, multiplexed as SEG
Used when a bypass capacitor is
connected externally, and when an
external power supply circuit is used
R/W
Initial Value
R/W
H'00
R/W
H'80
R/W
H'60
R/W
Undefined
R/W
H'FF
30
Address
H'FFC0
H'FFC1
H'FFC2
H'F740, H'F75F
H'FFFB
325
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