Hitachi H8/3827R Series Hardware Manual page 303

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Start
bit
Serial
1
0
D0
data
MPIE
RDRF
RDR
value
LSI
operation
User
processing
Start
bit
Serial
1
0
D0
data
MPIE
RDRF
RDR
value
LSI
operation
User
processing
Figure 10.20 Example of Operation when Receiving using Multiprocessor Format
Receive
data (ID1)
MPB
D1
D7
1
1 frame
RXI request
MPIE cleared
to 0
(a) When data does not match this receiver's ID
Receive
data (ID2)
MPB
D1
D7
1
1 frame
ID1
RXI request
MPIE cleared
to 0
(b) When data matches this receiver's ID
(8-bit data, multiprocessor bit, 1 stop bit)
Stop
Start
Receive data
bit
bit
(Data1)
1
0
D0
D1
1 frame
RDRF cleared
to 0
RDR data read
When data is not
this receiver's ID,
bit MPIE is set to
1 again
Stop
Start
Receive data
bit
bit
(Data2)
1
0
D0
D1
1 frame
ID2
RDRF cleared
to 0
RDR data read
When data is
this receiver's
ID, reception
is continued
Stop
Mark state
bit
(idle state)
MPB
D7
0
1
ID1
No RXI request
RDR retains
previous state
Stop
Mark state
bit
(idle state)
MPB
D7
0
1
Data2
RXI request
RDRF cleared
to 0
RDR data read
Bit MPIE set to
1 again
1
1
297

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