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C.2
Block Diagrams of Port 3
V
CC
V
CC
P3
n
V
SS
PDR3:
Port data register 3
PCR3:
Port control register 3
PMR3:
Port mode register 3
PUCR3:
Port pull-up control register 3
n=7 to 6
Figure C.2 (a) Port 3 Block Diagram (Pin P3
SBY
PUCR3
n
PMR3
n
PDR3
n
PCR3
n
to P3
)
7
6
AEC module
AEVH(P3
)
6
AEVL(P3
)
7
451
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