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SSR32—Serial status register 32
Bit
7
TDRE32
Initial value
1
Read/Write
R/(W)
Multiprocessor bit transfer
0
1
Multiprocessor bit receive
0
Data in which the multiprocessor bit is 0 has been received
1
Data in which the multiprocessor bit is 1 has been received
Transmit end
0
Transmission in progress
[Clearing conditions]
Transmission ended
1
[Setting conditions]
Parity error
0
Reception in progress or completed normally
[Clearing conditions] After reading PER32 = 1, cleared by writing 0 to PER32
A parity error has occurred during reception
1
[Setting conditions]
Framing error
0
Reception in progress or completed normally
[Clearing conditions] After reading FER32 = 1, cleared by writing 0 to FER32
A framing error has occurred during reception
1
[Setting conditions] When the stop bit at the end of the receive data is checked for a value of 1 at completion of
Overrun error
Reception in progress or completed
0
[Clearing conditions] After reading OER32 = 1, cleared by writing 0 to OER32
1
An overrun error has occurred during reception
[Setting conditions] When the next serial reception is completed with RDRF32 set to 1
Receive data register full
0
There is no receive data in RDR32
[Clearing conditions] • After reading RDRF32 = 1, cleared by writing 0 to RDRF32
1
There is receive data in RDR32
[Setting conditions] When reception ends normally and receive data is transferred from RSR32 to RDR32
Transmit data register empty
0
Transmit data written in TDR32 has not been transferred to TSR32
[Clearing conditions] • After reading TDRE32 = 1, cleared by writing 0 to TDRE32
• When data is written to TDR32 by an instruction
1
Transmit data has not been written to TDR32, or transmit data written in TDR32 has been transferred to TSR32
[Setting conditions]
• When bit TE32 in serial control register 32 (SCR32) is cleared to 0
• When data is transferred from TDR32 to TSR32
Note: * Only a write of 0 for flag clearing is possible.
6
5
RDRF32
OER32
0
0
*
*
*
R/(W)
R/(W)
A 0 multiprocessor bit is transmitted
A 1 multiprocessor bit is transmitted
• After reading TDRE32 = 1, cleared by writing 0 to TDRE32
• When data is written to TDR32 by an instruction
• When bit TE in serial control register 32 (SCR32) is cleared to 0
• When bit TDRE32 is set to 1 when the last bit of a transmit character is sent
When the number of 1 bits in the receive data plus parity bit does not match the parity
designated by the parity mode bit (PM32) in the serial mode register (SMR32)
reception, and the stop bit is 0
• When RDR32 data is read by an instruction
H'AC
4
3
FER32
PER32
TEND32
0
0
*
*
R/(W)
R/(W)
2
1
0
MPBR32
MPBT32
1
0
0
R
R
R/W
SCI32
413
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