Hitachi H8/3827R Series Hardware Manual page 300

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SCI3 operates as follows when transmitting data.
SCI3 monitors bit TDRE in SSR, and when it is cleared to 0, recognizes that data has been written
to TDR and transfers data from TDR to TSR. It then sets bit TDRE to 1 and starts transmitting. If
bit TIE in SCR3 is set to 1 at this time, a TXI request is made.
Serial data is transmitted from the TXD pin using the relevant data transfer format in table 10.11.
When the stop bit is sent, SCI3 checks bit TDRE. If bit TDRE is cleared to 0, SCI3 transfers data
from TDR to TSR, and when the stop bit has been sent, starts transmission of the next frame. If
bit TDRE is set to 1 bit TEND in SSR bit is set to 1, the mark state, in which 1s are transmitted, is
established after the stop bit has been sent. If bit TEIE in SCR3 is set to 1 at this time, a TEI
request is made.
Figure 10.18 shows an example of the operation when transmitting using the multiprocessor
format.
Start
bit
Serial
1
0
data
TDRE
TEND
LSI
TXI request
operation
User
processing
Figure 10.18 Example of Operation when Transmitting using Multiprocessor Format
• Multiprocessor receiving
Figure 10.19 shows an example of a flowchart for multiprocessor data reception. This procedure
should be followed for multiprocessor data reception after initializing SCI3.
294
Transmit
data
MPB
D0
D1
D7
1 frame
TDRE
cleared to 0
Data written
to TDR
(8-bit data, multiprocessor bit, 1 stop bit)
Stop
Start
bit
bit
0/1
1
0
D0
1 frame
TXI request
Transmit
Stop
data
MPB
D1
D7
0/1
TEI request
Mark
bit
state
1
1

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